參數(shù)資料
型號(hào)： TLIU04C1
廠商： Lineage Power
英文描述： Quad T1/E1 Line Interface(四T1/E1線接口)
中文描述： 四T1/E1線路接口（四個(gè)T1/E1線接口）
文件頁(yè)數(shù)： 30/100頁(yè)
文件大?。?/td> 1321K
代理商： TLIU04C1
Advance Data Sheet, Rev. 2
TLIU04C1 Quad T1/E1 Line Interface
April 1999
30
Lucent Technologies Inc.
Microprocessor Mode
(continued)
Zero Substitution Encoding (CODE)
Zero substitution B8ZS/HDB3 encoding can be acti-
vated only in the single-rail system interface mode
(DUAL = 0). CODE = 1 selects the B8ZS/HDB3 encod-
ing operation in all four channels, regardless of the
state of the CODE[1—4] bits. The B8ZS/HDB3 encod-
ing operation can be selected for individual channels
independently by setting CODE = 0 and programming
CODE[1—4] bits for the respective channels.
Note:
Encoding and decoding are not independent.
Selecting B8ZS/HDB3 encoding in the transmit-
ter selects B8ZS/HDB3 decoding in the receiver.
Table 13. Register Map for CODE Bits
When coding is selected for a given channel, data
transmitted from the system interface on TDATA (pins
141, 16, 69, 88) will be B8ZS/HDB3 encoded before
appearing on TTIP and TRING at the line interface.
Alarm Indication Signal Generator (XAIS)
When the transmit alarm indication signal control is set
(XAIS = 1) for a given channel (registers 6—9, bit 2), a
continuous stream of bipolar ones is transmitted to the
line interface. The TPD/TDATA and TND inputs are
ignored during this mode. The XAIS input is ignored
when a remote loopback (RLOOP) is selected using
loopback control bits (LOOPA and LOOPB; registers
6—9, bits 3 and 4). (See the Loopbacks section.)
The normal clock source for the AIS signal is TCLK. If
TCLK is not available (loss of TCLK detected), then the
AIS signal clock defaults to INTXCLK/16. INTXCLK is
either XCLK, or 16x XCLK, depending on the state of
the CLKS input pin. See Figure 3 on page 19, and
CLKS in Table 1, Pin Descriptions, on page 10. For any
of the above options, the clock tolerance must meet the
normal line transmission rates (DS1 1.544 MHz ±
32 ppm; CEPT 2.048 MHz ± 50 ppm).
Transmitter Alarms
Loss of Transmit Clock (LOTC) Alarm
A loss of transmit clock alarm (LOTC = 1; registers 0
and 1, bits 3 and 7) is indicated if any of the clocks in
the transmit path disappear. This includes loss of TCLK
input, loss of RCLK during remote loopback, loss of jit-
ter attenuator output clock (when enabled), or the loss
of clock from the pulse-width controller.
For all of these conditions, a core transmitter timing
clock is lost and no data can be driven onto the line.
Output drivers TTIP and TRING are placed in a high-
impedance state when this alarm condition is active.
The LOTC interrupt is asserted between 3 μs and
16 μs after the clock disappears, and deasserts imme-
diately after detecting the first clock edge. The LOTC
alarm status bit will latch the alarm and remain set until
being cleared by a read (clear on read). Upon the tran-
sition from LOTC = 0 to LOTC = 1, a microprocessor
interrupt will be generated if the corresponding LOTC
interrupt mask bit (MLOTC; registers 2 and 3, bits 3
and 7), the channel mask bit (MASK; registers 6—9,
bit 1), or the global mask bit (GMASK; register 4, bit 0)
is not set.
An LOTC alarm may occur when RLOOP is activated
and deactivated due to the phase transient that occurs
as TCLK switches its source to and from RCLK. Setting
the prevent RLOOP alarm bit (PRLALM = 1; LIU
register 12, bit 3) prevents the LOTC alarm from occur-
ring at the activation and deactivation of RLOOP but
allows the alarm to operate normally during the
RLOOP active period.
Transmit Driver Monitor (TDM) Alarm
The transmit driver monitor detects two conditions: a
nonfunctional link due to a fault on the primary of the
transmit transformer, or periods of no data transmis-
sion. The transmit driver monitor alarm (TDM; registers
0 and 1, bits 2 and 6) is the ORed function of both
faults and provides information about the integrity of
the transmit signal path.
The first monitoring function is provided to detect non-
functional links and protect the device from damage.
The alarm is set (TDM = 1) when one of the transmit-
ter's line drivers (TTIP or TRING) is shorted to power
supply or ground, or TTIP and TRING are shorted
together. Under these conditions, internal circuitry pro-
tects the device from damage and excessive power
supply current consumption by 3-stating the output
drivers. The monitor detects faults on the transformer
primary, but transformer secondary faults may not be
detected.
Name
Location
Register
5
12
12
11
11
Bit
3
7
6
6
4
CODE
CODE1
CODE2
CODE3
CODE4
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