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參數(shù)資料
| 型號(hào)： | TLIU04C1 |
| 廠商： | Lineage Power |
| 英文描述： | Quad T1/E1 Line Interface(四T1/E1線接口) |
| 中文描述： | 四T1/E1線路接口（四個(gè)T1/E1線接口） |
| 文件頁數(shù)： | 79/100頁 |
| 文件大?。?/td> | 1321K |
| 代理商： | TLIU04C1 |
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Advance Data Sheet, Rev. 2
April 1999
TLIU04C1 Quad T1/E1 Line Interface
79
Lucent Technologies Inc.
Direct Logic Control Mode
(continued)
Transmitter Configuration Modes
Zero Substitution Encoding (CODE)
Zero substitution B8ZS/HDB3 encoding can be acti-
vated only in the single-rail system interface mode
(DUAL = 0). The B8ZS/HDB3 encoding operation can
be selected for individual channels independently by
setting the CODE[1—4] pins high for the respective
channels.
Note:
Encoding and decoding are not independent.
Selecting B8ZS/HDB3 encoding in the transmit-
ter selects B8ZS/HDB3 decoding in the receiver.
When coding is selected for a given channel, data
transmitted from the system interface on TDATA will be
B8ZS/HDB3 encoded before appearing on TTIP and
TRING at the line interface.
Alarm Indication Signal Generator (XAIS)
When the transmit alarm indication signal control pin is
set (XAIS[1—4] = 1) for a given channel, a continuous
stream of bipolar ones is transmitted to the line inter-
face. The TPD/TDATA and TND inputs are ignored dur-
ing this mode. The XAIS input is ignored when a
remote loopback is selected using loopback control pin
(RLOOP) transmitter alarms.
The normal clock source for the AIS signal is TCLK. If
TCLK is not available (loss of TCLK detected), then the
AIS signal clock defaults to INTXCLK/16. INTXCLK is
either XCLK, or 16x XCLK, depending on the state of
the CLKS input pin. See Figure 26 on page 68, and
CLKS in Table 39, Pin Descriptions, on page 62.
Loss of Transmit Clock (LOTC) Alarm
A loss of transmit clock alarm (LOTC[1—4]) is indicated
if any of the clocks in the transmit path disappear. This
includes loss of TCLK input, loss of RCLK during
remote loopback, loss of jitter attenuator output clock
(when enabled), or the loss of clock from the pulse-
width controller.
For all of these conditions, a core transmitter timing
clock is lost and no data can be driven onto the line.
Output drivers TTIP and TRING are placed in a high-
impedance state when this alarm condition is active.
The LOTC pin is asserted low between 3 μs and 16 μs
after the clock disappears, and deasserts immediately
after detecting the first clock edge.
Transmit Driver Monitor (TDM) Alarm
The transmit driver monitor detects two conditions: a
nonfunctional link due to a fault on the primary of the
transmit transformer, or periods of no data transmis-
sion. The transmit driver monitor alarm (TDM[1—4]) is
the ORed function of both faults and provides informa-
tion about the integrity of the transmit signal path.
The first monitoring function is provided to detect non-
functional links and protect the device from damage.
The alarm is set (TDM = 0) when one of the transmit-
ter's line drivers (TTIP or TRING) is shorted to power
supply or ground, or TTIP and TRING are shorted
together.
Under these conditions, internal circuitry protects the
device from damage and excessive power supply cur-
rent consumption by 3-stating the output drivers. The
monitor detects faults on the transformer primary, but
transformer secondary faults may not be detected.
The monitor operates by comparing the line pulses with
the transmit inputs. After 32 transmit clock cycles, the
transmitter is powered up in its normal operating mode.
The drivers attempt to correctly transmit the next data
bit. If the error persists, TDM remains active to elimi-
nate alarm chatter and the transmitter is internally pro-
tected for another 32 transmit clock cycles. This
process is repeated until the error condition is removed
and the TDM alarm is deactivated.
The second monitoring function is to indicate periods of
no data transmission. The alarm is set (TDM = 0) when
32 consecutive zeros have been transmitted and the
alarm condition is cleared on the detection of a single
pulse. This alarm condition does not alter the state or
functionality of the signal path.
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