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參數(shù)資料
| 型號： | TLV2548MPWREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 6/37頁 |
| 文件大?。?/td> | 915K |
| 代理商： | TLV2548MPWREP |
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CS
CSTART
SDI
INT
SDO
Hi-Z
FS
(DSP)
Configure
Select
Conversion #1 From Channel 2
Select
Conversion #4 From Channel 2
Read FIFO
First FIFO Read
§
#1
#2
#3
#4
§
t(sample)
Hi-Z
Sample Times ≥ MIN t(sample)
(See Operating Characteristics)
t(sample)
Command = Configure write for mode 01, FIFO threshold = 1/2
Command = Read FIFO, first FIFO read
§ Command = Select ch2.
Minimum CS low time for select cycle is 6 SCLKs. The same amount of time is required between FS low to CSTART for proper channel decoding.
The low time of CSTART, not overlapped with CS low time, is the valid sampling time for the select cycle (see Figure 19).
CS
CSTART
SDI
INT
SDO
From Channel 0
FS
(DSP)
From Channel 3
Configure
Conversion
Read FIFO
#1
#2
#3
#4
Top of FIFO
Read FIFO
#1
From Channel 0
Conversion
From Channel 3
Conversion
Repeat
Second FIFO Read
Repeat
First FIFO Read
§
Command = Configure write for mode 10 or 11, FIFO threshold = 1/2, sweep seq = 0-1-2-3.
Command = Read FIFO
§ Use any channel select command to trigger SDI input.
SLAS668 – OCTOBER 2009
www.ti.com
Figure 11. TLV2548 Mode 01
μp/DSP Serial Interface (Conversions Triggered by CSTART)
Figure 12. TLV2548 Mode 10/11 DSP Serial Interface (Conversions Triggered by FS)
14
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV2548-EP
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