TLV320AIC27
STEREO AUDIO CODEC
SLAS253A – MARCH 2000 – REVISED SEPTEMBER 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
slot 1: command address port (continued)
Command Address Port Bit Assignments
Bit (19)
Read/write command (1 = read, 0 = write)
Bit (18:12)
Control register index (64 16-bit locations, addressed on even byte boundaries)
Bit (11:0)
Reserved (stuffed with 0s)
The first bit (MSB) sampled by the TLV320AIC27 indicates whether the current control transaction is a read or
a write operation. The following seven bit positions communicate the targeted control register address. The
trailing 12 bit positions within the slot are reserved and must be stuffed with 0s by the AC’97 controller.
slot 2: command data port
The command data port is used to deliver 16-bit control register write data in the event that the current command
port operation is a write cycle, as indicated by slot 1, bit 19.
Bit (19:4)
Control register write data (stuffed with 0s if current operation is a read)
Bit (3:0)
Reserved (stuffed with 0s)
If the current command port operation is a read, then the entire time slot must be stuffed with 0s by the AC’97
controller.
slot 3: pcm playback left channel
Audio output frame slot 3 is the composite digital audio left playback stream. In a typical games compatible PC,
this slot is composed of standard PCM (.wav) output samples digitally mixed (in the AC’97 controller or host
processor) with music synthesis output samples. If a sample stream with less than 20 bits of resolution is
transferred, the AC’97 controller must stuff all trailing invalid bit positions within this time slot with 0s.
slot 4: pcm playback right channel
Audio output frame slot 4 is the composite digital audio right-playback stream. In a typical games-compatible
PC, this slot is composed of standard PCM (.wav) output samples digitally mixed (on the AC’97 controller or
host processor) with music synthesis output samples.
If a sample stream with less than 20 bits of resolution is transferred, the AC’97 controller must stuff all trailing
invalid bit positions within this time slot with 0s.
slot 5: optional modem line1 codec
Audio output frame slot 5 contains the MSB-justified modem line1 DAC input data. This optional AC’97 feature
is supported in the TLV320AIC27, but only in the modem-operation mode (selected with the mode0/1 pins).
When data is written to this location, it is applied to the rear channel DACs if the modem mode is enabled. This
is determined by the AC’97 controller interrogating the TLV320AIC27 vendor ID registers. If modem mode is
disabled, the device appears not to support a modem. If the mode is enabled, the modem support flag is set.
slot 6 to 9: surround sound data
Audio output frame slots 6 to 9 are used to send surround-sound data to the extra DAC channels. These slots
are supported by TLV320AIC27 in Revision 2.1 six-channel mode and quad mode. Note that the data in the
surround-sound slots may be applied to the internal DACs, or sent out onto the GPIO pins as I2S data,
depending upon the mode and ID selected.
slot 10 optional modem line2 codec
Audio output frame slot 10 contains MSB-justified modem line2 DAC input data. This optional AC’97 feature
is supported by TLV320AIC27, but only when register 5Ah DLM (dual line modem) is set.
slot 11 handset DAC
Slot 11 is not supported.