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SLAS644B – JULY 2009 – REVISED OCTOBER 2009
Page 1 / Register 47: MIC PGA
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
1
0: MIC PGA is controlled by bits D6–D0.
1: MIC PGA is at 0 dB.
D6–D0
R/W
000 0000
000 0000: PGA = 0 dB
000 0001: PGA = 0.5 dB
000 0010: PGA = 1 dB
...
111 0110: PGA = 59 dB
111 0111: PGA = 59.5 dB
111 1000–111 1111: Reserved. Do not write these sequences to these bits.
Page 1 / Register 48: Delta-Sigma Mono ADC Channel Fine-Gain Input Selection for P-Terminal
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
00: MIC1LP is not selected for the MIC PGA.
(1) (2)
01: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1LP is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D5–D4
R/W
00
00: MIC1RP is not selected for the MIC PGA.
01: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 10 k
10: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 20 k
11: MIC1RP is selected for the MIC PGA with feed-forward resistance RIN = 40 k
D3–D2
R/W
00
00: MIC1LM is not selected for the MIC PGA.
01: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
10: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
11: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
D1–D0
R/W
00
Reserved. Write only zeros to these bits.
(1)
Program D7–D6 of register 48 and register 49 with the same value.
(2)
Input impedance selection affects the microphone PGA gain. See the
Analog Front End section for details.
Page 1 / Register 49: ADC Input Selection for M-Terminal
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6(
R/W
00
00: CM is not selected for the MIC PGA.
1) (2)
01: CM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: CM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: CM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D5–D4
00
00: MIC1LM is not selected for the MIC PGA.
01: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 10 k
.
10: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 20 k
.
11: MIC1LM is selected for the MIC PGA with feed-forward resistance RIN = 40 k
.
D3–D0
R/W
0000
Reserved. Write only zeros to these bits.
(1)
Program D7–D6 of register 48 and register 49 with the same value.
(2)
Input impedance selection affects the microphone PGA gain. See the
Analog Front End section for details.
Page 1 / Register 50: Input CM Settings
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: MIC1LP input is floating, if it is not used for the MIC PGA and analog bypass.
1: MIC1LP input is connected to CM internally, if it is not used for the MIC PGA and analog bypass.
D6
R/W
0
0: MIC1RP input is floating, if it is not used for the MIC PGA and analog bypass.
1: MIC1RP input is connected to CM internally, if it is not used for the MIC PGA and analog bypass.
D5
R/W
0
0: MIC1LM input is floating, if it is not used for the MIC PGA.
1: MIC1LM input is connected to CM internally, if it is not used for the MIC PGA.
D4–D1
R/W
0000
Reserved. Write only zeros to these bits.
D0
R
0
0: Not all programmed analog gains to the ADC have been applied yet.
1: All programmed analog gains to the ADC have been applied.
Copyright 2009, Texas Instruments Incorporated
REGISTER MAP
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