參數(shù)資料
型號： TLV320AIC36IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, PLASTIC, VFBGA-80
文件頁數(shù)： 12/168頁
文件大?。?/td> 1452K
代理商： TLV320AIC36IZQER
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
(continued)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D5–D4
R/W
00
Digital Microphone Input Configuration
00: GPIO serves as Digital Microphone Input
01: GPIO1 serves as Digital Microphone Input
10: DIN serves as Digital Microphone Input
11: Reserved. Do not use
D3
R/W
0
Left Channel Digital Microphone Power Control
0: Left Channel ADC not configured for Digital Microphone
1: Left Channel ADC configured for Digital Microphone
D2
R/W
0
Right Channel Digital Microphone Power Control
0: Right Channel ADC not configured for Digital Microphone
1: Right Channel ADC configured for Digital Microphone
D1–D0
R/W
00
ADC Volume Control Soft-Stepping Control
00: ADC Volume Control changes by 1 gain step per ADC Word Clock
01: ADC Volume Control changes by 1 gain step per two ADC Word Clocks
10: ADC Volume Control Soft-Stepping disabled
11: Reserved. Do not use
6.2.79 Page 0 / Register 82:
ADC Fine Gain Adjust Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
1
Left ADC Channel Mute Control
0: Left ADC Channel Un-muted
1: Left ADC Channel Muted
D6–D4
R/W
000
Left ADC Channel Fine Gain Adjust
000: Left ADC Channel Fine Gain = 0 dB
001: Left ADC Channel Fine Gain = -0.1 dB
010: Left ADC Channel Fine Gain = -0.2 dB
011: Left ADC Channel Fine Gain = -0.3 dB
100: Left ADC Channel Fine Gain = -0.4 dB
101-111: Reserved. Do not use
D3
R/W
1
Right ADC Channel Mute Control
0: Right ADC Channel Un-muted
1: Right ADC Channel Muted
D2–D0
R/W
000
Right ADC Channel Fine Gain Adjust
000: Right ADC Channel Fine Gain = 0 dB
001: Right ADC Channel Fine Gain = -0.1 dB
010: Right ADC Channel Fine Gain = -0.2 dB
011: Right ADC Channel Fine Gain = -0.3 dB
100: Right ADC Channel Fine Gain = -0.4 dB
101-111: Reserved. Do not use
6.2.80 Page 0 / Register 83:
Left ADC Channel Volume Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R
0
Reserved. Write only default values
Copyright 2009–2010, Texas Instruments Incorporated
REGISTER MAP
109
Product Folder Link(s): TLV320AIC36
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