參數(shù)資料
型號： TLV320AIC36IZQER
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, PLASTIC, VFBGA-80
文件頁數(shù)： 15/168頁
文件大?。?/td> 1452K
代理商： TLV320AIC36IZQER
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
(continued)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D6–D4
R/W
000
Left Channel AGC Target Level Setting
000: Left Channel AGC Target Level = -5.5 dBFS
001: Left Channel AGC Target Level = -8.0 dBFS
010: Left Channel AGC Target Level = -10.0 dBFS
011: Left Channel AGC Target Level = -12.0 dBFS
100: Left Channel AGC Target Level = -14.0 dBFS
101: Left Channel AGC Target Level = -17.0 dBFS
110: Left Channel AGC Target Level = -20.0 dBFS
111: Left Channel AGC Target Level = -24.0 dBFS
D3–D0
R
0000
Reserved. Write only default values
6.2.84 Page 0 / Register 87:
Left Channel AGC Control Register 2
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
Left Channel AGC Hysteresis Setting
00: Left Channel AGC Hysteresis is 1.0 dB
01: Left Channel AGC Hysteresis is 2.0 dB
10: Left Channel AGC Hysteresis is 4.0 dB
11: Left Channel AGC Hysteresis is disabled
D5–D1
R/W
00 000
Left Channel AGC Noise Threshold
0 0000: Left Channel AGC Noise Gate disabled
0 0001: Left Channel AGC Noise Threshold is -30 dB
0 0010: Left Channel AGC Noise Threshold is -32 dB
0 0011: Left Channel AGC Noise Threshold is -34 dB
…
1 1101: Left Channel AGC Noise Threshold is -86 dB
1 1110: Left Channel AGC Noise Threshold is -88 dB
1 1111: Left Channel AGC Noise Threshold is -90 dB
D0
R
0
Reserved. Write only default value
6.2.85 Page 0 / Register 88:
Left Channel AGC Control Register 3
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R
0
Reserved. Write only default value
D6–D0
R/W
111 1111
Left Channel AGC Maximum Gain Setting
000 0000: Left Channel AGC Maximum Gain = 0.0 dB
000 0001: Left Channel AGC Maximum Gain = 0.5 dB
000 0010: Left Channel AGC Maximum Gain = 1.0 dB
…
111 0011: Left Channel AGC Maximum Gain = 57.5 dB
111 0100-111 1111: Left Channel AGC Maximum Gain = 58.0 dB
6.2.86 Page 0 / Register 89:
Left Channel AGC Control Register 4
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D3
R/W
0000 0
Left Channel AGC Attack Time Setting
0 0000: Left Channel AGC Attack Time = 1*32 ADC Word Clocks
0 0001: Left Channel AGC Attack Time = 3*32 ADC Word Clocks
0 0010: Left Channel AGC Attack Time = 5*32 ADC Word Clocks
…
1 1101: Left Channel AGC Attack Time = 59*32 ADC Word Clocks
1 1110: Left Channel AGC Attack Time = 61*32 ADC Word Clocks
1 1111: Left Channel AGC Attack Time = 63*32 ADC Word Clocks
Copyright 2009–2010, Texas Instruments Incorporated
REGISTER MAP
111
Product Folder Link(s): TLV320AIC36
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