參數(shù)資料
型號： TMP90C400
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時器/事件計數(shù)器）)
中文描述： 采用先進(jìn)的CMOS高速8位微控制器，集成8位CPU，內(nèi)存，光盤，通用串行接口，多功能定時器/事件計數(shù)器（高速，先進(jìn)的的CMOS 8位微控制器（芯片集成了8位的CPU，ROM和RAM內(nèi)存，通用串行接口，多功能定時器/事件計數(shù)器））
文件頁數(shù)： 25/100頁
文件大小： 2591K
代理商： TMP90C400
TOSHIBA CORPORATION
25
TMP90C400/401
3.4 Standby Function
When a HALT instruction is executed, the TMP90C400
selects one of the following modes as determined by the halt
mode setting register:
(1) RUN:
Suspends only the CPU operation. The power
consumption remains unchanged.
(2) IDLE1:
Suspends all internal circuits except the
internal oscillator. In this mode, the power
consumption is less than 1/10 of that in the
normal operation.
(3) IDLE2:
Operate only the internal oscillator and
specific internal I/O devices. The power
consumption is about 1/3 of that in the nor
mal operation.
(4) STOP:
Suspends all internal circuits including the
internal oscillator. In this mode, the power
consumption is considerably reduced.
The HALT mode set register (STBMOD <HALTM 1, 0> is
assigned to the bits 2 and 3 of the memory address FFD8H in
the internal I/O register area (other bits are used to control
other functions). The register is reset to “00” (RUN mode) by
resetting.
These HALT state can be released by an interrupt request
or reset. The methods for releasing the HALT status are
shown in Table 3.4 (2). Either a non-maskable or maskable
interrupt with EI (enable interrupt) condition is acknowledged and
interrupt processing is processed. A maskable interrupt with DI
instruction that follows the HALT instruction, but the interrupt
request flag is held at “1”.
When the halt status is released by reset, however, note
that it is not possible to hold the status (including built-in RAM)
in effect immediately before entering the STOP status. In this
case, it is recommended that an interrupt request be used for
releasing.
Figure 3.4 (1). HALT Mode Set Register
相關(guān)PDF資料
PDF描述
TMP90C401 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，多功能定時器/事件計數(shù)器）)
TMP90C800 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時器/事件計數(shù)器）)
TMP90C801 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時器/事件計數(shù)器）)
TMP90CH02 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時器/事件計數(shù)器）)
TMP90CH03 High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM，ROM，General Serial Interface,Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器（芯片集成了8位CPU,ROM，RAM，通用串行接口，定時器/事件計數(shù)器）)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP90C400F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C400N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C400N/F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
TMP90C401F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C401N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
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