參數(shù)資料
型號(hào): TMP90C400
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CPU,RAM,ROM,General Serial Interface,Multifunction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位CPU,ROM,RAM,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器))
中文描述: 采用先進(jìn)的CMOS高速8位微控制器,集成8位CPU,內(nèi)存,光盤,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器(高速,先進(jìn)的的CMOS 8位微控制器(芯片集成了8位的CPU,ROM和RAM內(nèi)存,通用串行接口,多功能定時(shí)器/事件計(jì)數(shù)器))
文件頁(yè)數(shù): 56/100頁(yè)
文件大?。?/td> 2591K
代理商: TMP90C400
56
TOSHIBA CORPORATION
TMP90C400/401
Timer registers
8-bit registers are provided to set the interval time.
When the set value of a timer register matches that of
an up-counter, the match signal of their comparators
turn to the active mode. If “00H” is set, this signal
becomes active when the up-counter overflows. When
a new value is written to this register, it is then immediately
input to the comparator.
The value of the timer register 0 and timer register 1
cannot be read out. Timer registers 2 and 3 are allocated
to the same address with counter latch registers. The
readout value becomes the counter latch register value.
The written value becomes the timer register value.
Comparators
A comparator compares the values in an up-counter
and a timer register. When they matches, the up-counter
is cleared to “0”, and an interrupt signal (INTT0 ~ 3) is
generated. If the timer flip-flop inversion is enabled by
the timer flip-flop control register, the timer flip-flop is
inverted.
Timer Flip-flop (Timer F/F)
The timer flip-flop is inverted by the match signal (output
by comparator). Its status can be output to the timer
output pin TO1 (also used as P34).
This timer F/F is controlled by a timer flip-flop control
register (TFFCR).
In the case of TFF1 (Timer F/F for Timer 0 and Timer 1),
the flip-flop operation is described as follows (refer to
Figure 3.6 (7)):
TFFCR <FF1IS> is a timer selection bit for inversion
of TFF1. In the 8-bit timer mode, inversion is enabled
by the match signal from Timer 0 if this bit is set to “0”,
or by the signal from Timer 1 is set to “1”.
In any other mode, <FF1IS> must be always set to “1”.
It is initialized to “0” by resetting.
TFFCR <FF1IE> controls the inversion of TFF1. Setting
this bit to “1” enables the inversion and setting it to “0”
disables.
FF1IE is initialized to “0” by resetting.
The bits TFFCR <TFF1C1, 0> are used to set/reset
TFF1 or enable its inversion by software. TFF1 is reset
by writing “0, 0”, set by “0, 1” and inverted by “1, 0”.
The 8-bit timers operate as follows:
(1)
8-bit Timer Mode
The four interval timers 0, 1, 2 and 3 can operate
independently as an 8-bit interval timer. Timer 2 and 3
do not provide timer output operation, but timer
operations are the same as for Timer 0 and 1. The
operation of Timer 1 is described in the following.
Generating interrupts at specified intervals
Periodic interrupts can be generated by using Timer 1
(INTT1) in the following procedure:
1) stop Timer 1,
2) set the desired operating mode, input clock and
cycle time in, the registers TMOD, TCLK and
TREG1,
3) set INTT1 to “enable”, and
4) start the counting of Timer 1.
Example: To generate Timer 1 interrupt every 4.0
fc =10MHz, the registers should be set as
follows:
μ
s at
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP90C400F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C400N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C400N/F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
TMP90C401F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90C401N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller