參數(shù)資料
型號: TMS320C15-25
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors(160ns指令周期,分離的程序和數(shù)據(jù)總線,外部輪詢中斷的DSP)
中文描述: 數(shù)字信號處理器(160ns指令周期,分離的程序和數(shù)據(jù)總線,外部輪詢中斷的數(shù)字信號處理器)
文件頁數(shù): 98/139頁
文件大小: 1478K
代理商: TMS320C15-25
TMS320C17, TMS320E17, TMS320LC17, TMS320P17
DIGITAL SIGNAL PROCESSORS
SPRS009C–JANUARY 1987–REVISED JULY 1991
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
98
Table 7. Serial Clock (SCLK) Divide Ratios (X2/CLKIN = 20.48 MHz)
CR27
CR26
CR25
CR24
DIVIDE RATIO
SCLK FREQUENCY
UNIT
0
0
0
0
32
0.640
MHz
0
0
0
1
28
0.731
MHz
0
0
1
0
24
0.853
MHz
0
1
0
0
20
1.024
MHz
1
0
0
0
16
1.280
MHz
1
0
0
1
14
1.463
MHz
1
0
1
0
12
1.706
MHz
1
1
0
0
10
2.048
MHz
The specification for
μ
-law and A-law log PCM coding is part of the CCITT G.711 recommendation. The
following diagram shows a
C17/E17/P17 interface to two codecs as used for
μ
-law or A-law companding format.
DX0
DR0
SCLK
FR
DX1
DR1
VSS
VCC
MC
MC/PM
X2
X1
+5 V
PCM In
PCM Out
CLKR/X
FSX
FSR
TCM29C13
PCM In
PCM Out
CLKR/X
FSX
FSR
TCM29C13
Analog Out
Analog In
Analog Out
Analog In
TMS320C17/E17/P17
coprocessor port
The coprocessor port, accessed through I/O port 5 using IN and OUT instructions, provides a direct connection
to most 4/8-bit microcomputers and 16/32-bit micorprocessors. The coprocessor interface allows the
C17/E17/P17 to act as a peripheral (slave) microcomputer to a microprocessor, or a master to a peripheral
microcomputer such as TMS7042. The coprocessor port is enabled by setting MC/PM and MC low. The
microcomputer mode is enabled by setting these two pins high. (Note that MC/PM
MC is undefined.)
In the microcomputer mode, the 16 data lines are used for the 6 parallel 16-bit I/O ports.
In the coprocessor mode, the 16-bit coprocessor port is reconfigured to operate as a 16-bit latched bus interface.
Control bit 30 (CR30) in control register 1 is used to configure the coprocessor port to either an 8-bit or a 16-bit
length. When CR30 is high, the coprocessor port is 16 bits wide thereby making all 16 bits of the data port
available for 16-bit transfers to 16 and 32-bit microprocessors. When CR30 is low, the port is 8-bits wide and
mapped to the low byte of the data port for interfacing to 8-bit microcomputers. When operating in the 8-bit mode,
both halves of the 16-bit latch can be addressed using the HI/LO pin, thus allowing 16-bit transfers over 8 data
lines. When not in the coprocessor mode, port 5 can be used as a generic I/O port.
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