
TMS320C240, TMS320F240
DSP CONTROLLERS
SPRS042D – OCTOBER 1996 – REVISED NOVEMBER 1998
65
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
timing parameter symbology
Timing parameter symbols used are created in accordance with JEDEC Standard 100-A. To shorten the
symbols, some of the pin names and other related terminology have been abbreviated as follows:
A
A[15:0]
MS
Memory strobe pins IS, DS, or PS
Cl
XTAL1/CLKIN
R
READY
CO
CLKOUT/IOPC1
RD
Read cycle or W/R
D
D[15:0]
RS
RS or PORESET
INT
NMI, XINT1, XINT2/IO, and XINT3/IO
W
Write cycle or WE
Lowercase subscripts and their meanings:
Letters and symbols and their meanings:
a
access time
H
High
c
cycle time (period)
L
Low
d
delay time
V
Valid
f
fall time
X
Unknown, changing, or don’t care level
h
hold time
Z
High impedance
r
rise time
su
setup time
t
transition time
v
valid time
w
pulse duration (width)
general notes on timing parameters
All output signals from the TMS320x240 devices (including CLKOUT) are derived from an internal clock such
that all output transitions for a given half-cycle occur with a minimum of skewing relative to each other.
The signal combinations shown in the following timing diagrams may not necessarily represent actual cycles.
For actual cycle examples, see the appropriate cycle description section of this data sheet.
External
Clock Signal
(toggling 0–5 V)
C2
(see Note A)
C1
(see Note A)
Crystal
XTAL2
XTAL1/CLKIN
XTAL1/CLKIN
XTAL2
NC
See Note B
NOTES: A. For the values of C1 and C2, see the crystal manufacturer’s specification.
B. Use this configuration in conjunction with OSCBYP pin pulled low.
C. Texas Instruments encourages customers to submit samples of the device to the resonator/crystal vendor for full characterization.
Figure 20. Recommended Crystal/Clock Connection