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| 型號： | TMS320C6205GHK200 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 25/73頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP FIXED POINT HP 288-BGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | TMS320C62x |
| 類型： | 定點(diǎn) |
| 接口： | McBSP，PCI |
| 時(shí)鐘速率： | 200MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 128kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.50V |
| 工作溫度： | 0°C ~ 90°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 288-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 288-BGA Microstar（16x16） |
| 包裝： | 托盤 |
| 其它名稱： | 296-12673 |
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TMS320C6205
FIXEDPOINT DIGITAL SIGNAL PROCESSOR
SPRS106G OCTOBER 1999 REVISED JULY 2006
31
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Table 5. Characteristics of the Power-Down Modes
PRWD FIELD
(BITS 1510)
POWER-DOWN
MODE
WAKE-UP METHOD
EFFECT ON CHIP’S OPERATION
000000
No power-down
—
001001
PD1
Wake by an enabled interrupt
CPU halted (except for the interrupt logic)
Power-down mode blocks the internal clock inputs at the
010001
PD1
Wake by an enabled or
non-enabled interrupt
Power-down mode blocks the internal clock inputs at the
boundary of the CPU, preventing most of the CPU’s logic from
switching. During PD1, DMA transactions can proceed between
peripherals and internal memory.
011010
PD2
Wake by a device reset
Output clock from PLL is halted, stopping the internal clock
structure from switching and resulting in the entire chip being
halted. All register and internal RAM contents are preserved. All
functional I/O “freeze” in the last state when the PLL clock is
turned off.
011100
PD3
Wake by a device reset
Input clock to the PLL stops generating clocks. All register and
internal RAM contents are preserved. All functional I/O “freeze” in
the last state when the PLL clock is turned off. Following reset, the
PLL needs time to re-lock, just as it does following power-up.
Wake-up from PD3 takes longer than wake-up from PD2 because
the PLL needs to be re-locked.
All others
Reserved
—
When entering PD2 and PD3, all functional I/O remains in the previous state. However, for peripherals which are asynchronous in nature or
peripherals with an external clock source, output signals may transition in response to stimulus on the inputs. Under these conditions,
peripherals will not operate according to specifications.
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| TMS320C6205GHKA200 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320C6205GJC100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GJL100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GLS100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GLW100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
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