- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19450 > TMS320C6205GHK200 (Texas Instruments)IC DSP FIXED POINT HP 288-BGA PDF資料下載
參數(shù)資料
| 型號(hào)： | TMS320C6205GHK200 |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 57/73頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP FIXED POINT HP 288-BGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | TMS320C62x |
| 類型： | 定點(diǎn) |
| 接口： | McBSP，PCI |
| 時(shí)鐘速率： | 200MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 128kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.50V |
| 工作溫度： | 0°C ~ 90°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 288-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 288-BGA Microstar（16x16） |
| 包裝： | 托盤 |
| 其它名稱： | 296-12673 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)當(dāng)前第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)
TMS320C6205
FIXEDPOINT DIGITAL SIGNAL PROCESSOR
SPRS106G OCTOBER 1999 REVISED JULY 2006
60
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
timing requirements for McBSP as SPI master or slave: CLKSTP = 11b, CLKXP = 0 (see Figure 36)
200
NO.
MASTER
SLAVE
UNIT
NO.
MIN
MAX
MIN
MAX
UNIT
4
tsu(DRV-CKXH) Setup time, DR valid before CLKX high
12
2 3P
ns
5
th(CKXH-DRV)
Hold time, DR valid after CLKX high
4
5 + 6P
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
switching characteristics over recommended operating conditions for McBSP as SPI master or
slave: CLKSTP = 11b, CLKXP = 0 (see Figure 36)
200
NO.
PARAMETER
MASTER§
SLAVE
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
UNIT
1
th(CKXL-FXL)
Hold time, FSX low after CLKX low
L 2
L + 3
ns
2
td(FXL-CKXH)
Delay time, FSX low to CLKX high#
T 2
T + 3
ns
3
td(CKXL-DXV)
Delay time, CLKX low to DX valid
2
4
3P + 4
5P + 17
ns
6
tdis(CKXL-DXHZ)
Disable time, DX high impedance following last data bit from
CLKX low
2
4
3P + 3
5P + 17
ns
7
td(FXL-DXV)
Delay time, FSX low to DX valid
H 2
H + 4
2P + 2
4P + 17
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
§ S = sample rate generator input clock = P if CLKSM = 1 (P = 1/CPU clock frequency)
=
sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T =
CLKX period = (1 + CLKGDV) * S
H =
CLKX high pulse width = (CLKGDV/2 + 1) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
L =
CLKX low pulse width
= (CLKGDV/2) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
FSRP = FSXP = 1. As a SPI master, FSX is inverted to provide active-low slave-enable output. As a slave, the active-low signal input on FSX
and FSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for slave McBSP
# FSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master clock
(CLKX).
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
4
3
7
6
2
1
CLKX
FSX
DX
DR
5
Figure 36. McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EBM18DRMH-S288 | CONN EDGECARD 36POS .156 EXTEND |
| ACM36DRSN | CONN EDGECARD 72POS DIP .156 SLD |
| GEM24DSEN-S13 | CONN EDGECARD 48POS .156 EXTEND |
| ACM36DRSH | CONN EDGECARD 72POS DIP .156 SLD |
| 171-050-202L031 | CONN DB50 FEMALE SOLDER CUP TIN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C6205GHKA200 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320C6205GJC100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GJL100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GLS100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMS320C6205GLW100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。