參數(shù)資料
型號: TMS320C6415TGLZ7
廠商: Texas Instruments
文件頁數(shù): 20/146頁
文件大小: 0K
描述: IC DSP FIXED-POINT 532-FCBGA
標(biāo)準(zhǔn)包裝: 60
系列: TMS320C6414T/15T/16T
類型: 定點
接口: 主機接口,McBSP,PCI,UTOPIA
時鐘速率: 720MHz
非易失內(nèi)存: 外部
芯片上RAM: 1.03MB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 532-BFBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 532-FCBGA(23x23)
包裝: 托盤
配用: TMDXEVM6452-ND - TMDXEVM6452
296-23038-ND - DSP STARTER KIT FOR TMS320C6416
其它名稱: 296-17756
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
116
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PERIPHERAL COMPONENT INTERCONNECT (PCI) TIMING [C6415T AND C6416T ONLY]
(CONTINUED)
timing requirements for serial EEPROM interface (see Figure 50)
NO.
600
720
850
1G
UNIT
MIN
MAX
8
tsu(DIV-CLKH)
Setup time, XSP_DI valid before XSP_CLK high
50
ns
9
th(CLKH-DIV)
Hold time, XSP_DI valid after XSP_CLK high
0
ns
switching characteristics over recommended operating conditions for serial EEPROM interface
(see Figure 50)
NO.
PARAMETER
600
720
850
1G
UNIT
MIN
TYP
MAX
1
tw(CSL)
Pulse duration, XSP_CS low
4092P
ns
2
td(CLKL-CSL)
Delay time, XSP_CLK low to XSP_CS low
0
ns
3
td(CSH-CLKH)
Delay time, XSP_CS high to XSP_CLK high
2046P
ns
4
tw(CLKH)
Pulse duration, XSP_CLK high
2046P
ns
5
tw(CLKL)
Pulse duration, XSP_CLK low
2046P
ns
6
tosu(DOV-CLKH)
Output setup time, XSP_DO valid before XSP_CLK high
2046P
ns
7
toh(CLKH-DOV)
Output hold time, XSP_DO valid after XSP_CLK high
2046P
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 720 MHz, use P = 1.39 ns.
8
7
6
3
2
5
4
1
XSP_CS
XSP_CLK
XSP_DO
XSP_DI
9
Figure 50. PCI Serial EEPROM Interface Timing
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