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參數(shù)資料
| 型號： | TMXF84622 |
| 英文描述： | TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper |
| 中文描述： | TMXF84622 155 Mbits/s/622 Mbits /秒接口的SONET / SDH x84/x63 Ultramapper |
| 文件頁數(shù)： | 31/62頁 |
| 文件大小： | 902K |
| 代理商： | TMXF84622 |
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Agere Systems Inc.
31
Advance Data Sheet, Rev. 2
July 2001
SONET/SDH x84/x63 Ultramapper
TMXF84622 155 Mbits/s/622 Mbits/s Interface
3 Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
Pin
* O
1
indicates external pull-up recommended (unused or system required),
I/O
2
indicates external pull-down recommended (unused or system required),
I
D
; I/O
D
indicate internal pull-down,
I
U
indicates internal pull-up.
Symbol
Type
I/O
*
TMUX Block
(continued)
TOAC Input and Output Channels (6)
—
O
Receive Side Serial Access Channel Clock Output for the
Transport Overhead Bytes.
—
O
Receive Side Serial Access Channel Data Output for the
Transport Overhead Bytes.
—
O
Receive Side Sync Output for TOAC Channel.
Active-high
during the LSB of the last byte.
—
O
Transmit Side Serial Access Channel Clock Output for
the Transport Overhead Bytes.
—
I
D
Transmit Side Serial Access Channel Data Input for the
Transport Overhead Bytes.
—
O
Transmit Side Sync Output for TOAC Channel.
Active-high
during the LSB of the last byte.
POAC Input and Output Channels (6)
—
O
Receive Side Serial Access Channel Clock Output for the
Path Overhead Bytes.
This pin can be individually 3-stated.
—
O
Receive Side Serial Access Channel Data Output for the
Path Overhead Bytes.
This pin can be individually 3-stated.
—
O
Receive Side Sync Output for POAC Channel.
Active-high
during the LSB of the last byte. This pin can be individually
3-stated.
—
O
Transmit Side Serial Access Channel Clock Output for
the Path Overhead Bytes.
This pin can be individually
3-stated.
—
I
D
Transmit Side Serial Access Channel Data Input for the
Path Overhead Bytes.
—
O
Transmit Side Sync Output for POAC Channel.
Active-
high during the LSB of the last byte. This pin can be individu-
ally
3-stated.
Miscellaneous Signals (2)
—
I
U
External Loss of Signal Input.
—
O
Receive Side Frame Sync Output Indicating the Frame
Location of the High-Speed Data Input.
Description
AM17
RTOACCLK
AJ17
RTOACDATA
AM18
RTOACSYNC
AL18
TTOACCLK
AP19
TTOACDATA
AK18
TTOACSYNC
AN19
RPOACCLK
AJ18
RPOACDATA
AP20
RPOACSYNC
AN20
TPOACCLK
AJ19
TPOACDATA
AM20
TPOACSYNC
AN21
AJ20
LOSEXT
RHSFSYNCN
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