參數(shù)資料
型號(hào): TPS65072TRSLRQ1
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: POWER SUPPLY SUPPORT CKT, PQCC48
封裝: 6 X 6 MM, 0.4 MM PITCH, PLASTIC, QFN-48
文件頁數(shù): 25/90頁
文件大?。?/td> 1375K
代理商: TPS65072TRSLRQ1
www.ti.com
SLVSAP7 – JANUARY 2011
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage falls
below the PFM comparator threshold of VOUTnominal +1%, the device starts a PFM pulse. For this the High Side
MOSFET switch will turn on and the inductor current ramps up. Then it will be turned off and the Low Side
MOSFET switch will be turned on until the inductor current becomes 0.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered
current the output voltage will rise. If the output voltage is equal or higher than the PFM comparator threshold,
the device stops switching and enters a sleep mode with typical 15mA current consumption.
In case the output voltage is still below the PFM comparator threshold, further PFM current pulses will be
generated until the PFM comparator threshold is reached. The converter starts switching again once the output
voltage drops below the PFM comparator threshold.
With a single threshold comparator, the output voltage ripple during PFM Mode operation can be kept very small.
The ripple voltage depends on the PFM comparator delay, the size of the output capacitor and the inductor
value. Increasing output capacitor values and/or inductor values will minimize the output ripple.
The PFM Mode is left and PWM Mode entered in case the output current can not longer be supported in PFM
Mode or if the output voltage falls below a second threshold, called PFM comparator low threshold. This PFM
comparator low threshold is set to –1% below nominal Vout, and enables a fast transition from Power Save
Mode to PWM Mode during a load step. In Power Save Mode the quiescent current is reduced typically to 15mA.
The Power Save Mode can be disabled through the I2C interface for each of the step-down converters
independent from each other. If Power Save Mode is disabled, the converter will then operate in fixed PWM
mode.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
active in Power Save Mode. It provides more headroom for both the voltage drop at a load step, and the voltage
increase at a load throw-off. This improves load transient behavior. At light loads, in which the converter operates
in PFM Mode, the output voltage is regulated typically 1% higher than the nominal value. In case of a load
transient from light load to heavy load, the output voltage drops until it reaches the PFM comparator low
threshold set to –1% below the nominal value and enters PWM mode. During a load throw off from heavy load to
light load, the voltage overshoot is also minimized due to active regulation turning on the Low Side MOSFET
switch.
Figure 30. Power Save Mode
100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output voltage.
In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
Vinmin = Voutmax + Ioutmax × (RDSonmax + RL)
(3)
With:
Copyright 2011, Texas Instruments Incorporated
31
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