參數(shù)資料
型號: TS68230P
廠商: 意法半導(dǎo)體
英文描述: HMOS PARALLEL INTERFACE/TIMER
中文描述: HMO的并行接口/定時器
文件頁數(shù): 46/61頁
文件大?。?/td> 2911K
代理商: TS68230P
Figure 5.3 :
Single Interrupt after Timeout Example.
5.2.4. ELAPSED TIME MEASUREMENT EXAM-
PLES. Elapsed time measurement takes several
forms ; two forms are described in the following
paragraphs.
5.2.4.1. System Clock Example.
This configuration allows time interval measure-
ment by software. The TIN pin may be used as an
external timer enable if desired.
The processor loads the counter preload registers
(generally with all ones), loads the timer control re-
gister, and then enables the timer. The counter is al-
lowed to decrement until the ending event takes
place. When it is desired to read the time interval, the
processor must halt the timer and then read the
counter. If TIN is used as an enable, the start and
stop counter functions are controlled externally.
For applications in which the interval may exceed
the programmed time interval, zero detection can be
counted by polling the status register or through in-
terrupts to simulate additional timer bits. Note that
the ZDS bit is latched and should be cleared after
each detection of zero. At the end, the timer can be
halted and read (see figure 5.4).
7
6
5
4
3
2
1
0
Timer
Enable
TOUT/TIACK
Control
*
Z.D
Control
Clock
Control
0
0
X
1
0
0
0 Changed
Figure 5.4 :
Elapsed Time Measurement Example.
TS68230
46/61
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