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參數(shù)資料
| 型號： | TS87C51RD2-VLMR |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 40 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 1.40 MM HEIGHT, VQFP-64 |
| 文件頁數(shù)： | 54/83頁 |
| 文件大?。?/td> | 8336K |
| 代理商： | TS87C51RD2-VLMR |
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52
32117D–AVR-01/12
AT32UC3C
7.6
Functional Description
7.6.1
Synchronous Clocks
The System RC Oscillator (RCSYS) and a selection of other clock sources can provide the
source for the main clock, which is the origin for the synchronous CPU/HSB and PBx module
clocks. For details about the other main clock sources, please refer to the Main Clock Control
(MCCTRL) register description. The synchronous clocks can run of the main clock and all the 8-
bit prescaler settings as long as f
CPU ≥ fPBx,. The synchronous clock source can be changed on-
the fly, according to variations in application load. The clock domains can be shut down in sleep
mode, as described in Section 7.6.3. The module clocks in every synchronous clock domain can
be individually masked to minimize power consumption in inactive modules.
Figure 7-2.
Synchronous Clock Generation
7.6.1.1
Selecting the main clock source
The common main clock can be connected to RCSYS or a selection of other clock sources. For
details about the other main clock sources, please refer to the MCCTRL register description. By
default, the main clock will be connected to RCSYS. The user can connect the main clock to
another source by writing to the Main Clock Select (MCCTRL.MCSEL) field. The user must first
assure that the source is enabled and ready in order to avoid a deadlock. Care should also be
taken so that the new synchronous clock frequencies do not exceed the maximum frequency for
each clock domain.
7.6.1.2
Selecting synchronous clock division ratio
The main clock feeds an 8-bit prescaler, which can be used to generate the synchronous clocks.
By default, the synchronous clocks run on the undivided main clock. The user can select a pres-
caler division for the CPU clock by writing a one to the CPU Division bit in the CPU Clock Select
register (CPUSEL.CPUDIV), and a value to the CPU Clock Select field (CPUSEL.CPUSEL),
resulting in a CPU clock frequency:
f
CPU = fmain / 2
(CPUSEL+1)
Mask
Prescaler
Main Clock
Sources
MCSEL
0
1
CPUSEL
CPUDIV
Main Clock
Sleep
Controller
CPUMASK
CPU Clocks
HSB Clocks
PBx Clocks
Sleep
Instruction
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