參數(shù)資料
型號(hào)： TSB41AB3IPFPEP
廠商： Texas Instruments
文件頁數(shù)： 53/55頁
文件大小： 0K
描述： IC 3PRT CABLE TXRX/ARBIT 80HTQFP
標(biāo)準(zhǔn)包裝： 96
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 6/6
規(guī)程： IEEE 1394
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 80-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 80-HTQFP（12x12）
包裝： 托盤
產(chǎn)品目錄頁面： 882 (CN2011-ZH PDF)
其它名稱： 296-22528
V62/03612-01XE
TSB41AB3EP
IEEE 1394a2000 THREEPORT CABLE TRANSCEIVER/ARBITER
SGLS122C JULY 2002 REVISED JUNE 2008
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
TYPE
NO.
I/O
DESCRIPTION
AGND
Supply
36, 37, 38,
39, 40, 41,
60, 61, 64,
65
Analog circuit ground terminals. These terminals must be tied together to the low-impedance circuit
board ground plane.
AVDD
Supply
34, 35, 47,
48, 54, 62,
63
Analog circuit power terminals. A combination of high-frequency decoupling capacitors near each
terminal are suggested, such as paralleled 0.1
F and 0.001 F. Lower frequency 10-F filtering
capacitors are also recommended. These supply terminals are separated from PLLVDD and DVDD
internal to the device to provide noise isolation. They are tied at a low-impedance point on the circuit
board.
CNA
CMOS
17
O
Cable not active output. This terminal is asserted high when there are no ports receiving incoming bias
voltage.
CPS
CMOS
27
I
Cable power status input. This terminal is normally connected to cable power through a 400-k
resistor. This circuit drives an internal comparator that is used to detect the presence of cable power.
This terminal is tied directly to DGND through a 1-k
resistor if application does not require it to be
used.
CTL0
CTL1
CMOS
5 V tol
4
5
I/O
Control I/Os. These bidirectional signals control communication between the TSB41AB3 and the LLC.
Bus holders are built into these terminals.
C/LKON
CMOS
22
I/O
Bus manager contender programming input and link-on output. On hardware reset, this terminal is
used to set the default value of the contender status indicated during self-ID. Programming is done by
tying the terminal through a 10-k
resistor to a high (contender) or low (not contender). The resistor
allows the link-on output to override the input. However, it is recommended that this terminal be
programmed low, and that the contender status be set via the C register bit.
If the TSB41AB3 is used with an LLC that has a dedicated terminal for monitoring LKON and also
setting the contender status, then a 10-k
series resistor is placed on the LKON line between the PHY
and LLC to prevent bus contention.
Following hardware reset, this terminal is the link-on output, which is used to notify the LLC to
power-up and become active. The link-on output is a square-wave signal with a period of
approximately 163 ns (8 SYSCLK cycles) when active. The link-on output is otherwise driven low,
except during hardware reset when it is high impedance.
The link-on output is activated if the LLC is inactive (LPS inactive or the LCtrl bit cleared) and when one
of the following is true:
a) the PHY receives a link-on PHY packet addressed to this node
b) the PEI (port-event interrupt) register bit is 1
c) any of the CTOI (configuration-timeout interrupt), CPSI (cable-power-status interrupt), or STOI
(state-timeout interrupt) register bits are 1 and the RPIE (resuming-port interrupt enable) register
bit is also 1.
Once activated, the link-on output stays active until the LLC becomes active (both LPS active and the
LCtrl bit set). The PHY also deasserts the link-on output when a bus-reset occurs unless the link-on
output is otherwise active because one of the interrupt bits is set (i.e., the link-on output is active due
solely to the reception of a link-on PHY packet).
NOTE: If an interrupt condition exists which otherwise causes the link-on output to be activated if the
LLC were inactive, the link-on output is activated when the LLC subsequently becomes inactive.
DGND
Supply
3, 16, 20,
21, 28, 70,
80
Digital circuit ground terminals. These terminals must be tied together to the low-impedance circuit
board ground plane.
D0D7
CMOS
5 V tol
7, 8, 10,
11, 12, 13,
14, 15
I/O
Data I/Os. These are bidirectional data signals between the TSB41AB3 and the LLC. Bus holders are
built into these terminals.
DVDD
Supply
6, 29, 30,
68, 69, 79
Digital circuit power terminals. A combination of high-frequency decoupling capacitors near each
terminal are suggested, such as paralleled 0.1
F and 0.001 F. Lower frequency 10-F filtering
capacitors are also recommended. These supply terminals are separated from PLLVDD and AVDD
internal to the device to provide noise isolation. They must be tied at a low-impedance point on the
circuit board.
相關(guān)PDF資料
PDF描述
TVP5150APBSRG4 IC VIDEO DECODER 8BIT 32TQFP
TVP5154AIPNP IC VIDEO DECODER 4CH 128-HTQFP
TW2804-FE IC NTSC/PAL VIDEO DECOD 128PQF
TW2809-BC1-GR IC INTERFACE
TW2815-TA1-GR IC A/V CODEC/DECOD 4CH 100TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB41AB3IPFPG4 制造商:Texas Instruments 功能描述:THREE PORT CBL TRNSCVR/ARBITER 1TX 1RX 400MBPS 80HTQFP - Rail/Tube
TSB41AB3MPFPEP 功能描述:1394 接口集成電路 Enh Product 3Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB41AB3PFP 功能描述:緩沖器和線路驅(qū)動(dòng)器 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel
TSB41AB3PFPG4 功能描述:1394 接口集成電路 Three-Port Cable Xcvr/Arbiter RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB41BA3 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE1394B THREE PORT CABLE TRANSCEIVER/ARBITER
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*