參數(shù)資料
型號： TSPC106AVGSU83CE
英文描述： MEMORY CONTROLLER
中文描述： 內(nèi)存控制器
文件頁數(shù)： 36/40頁
文件大?。?/td> 569K
代理商： TSPC106AVGSU83CE
36
TSPC106
2102B
–
HIREL
–
02/02
Preparation for
Delivery
Packaging
Microcircuits are prepared for delivery in accordance with MIL-PRF-38535.
Certificate of
Compliance
Atmel offers a certificate of compliance with each shipment of parts, confirming that the
products are in compliance with MIL-STD-883 and guaranteeing the parameters not
tested at temperature extremes for the entire temperature range.
Handling
MOS devices must be handled with certain precautions to avoid damage due to accu-
mulation of static charge. Input protection devices have been designed in the chip to
minimize the effect of this static buildup. However, the following handling practices are
recommended:
Devices should be handled on benches with conductive and grounded surfaces.
Ground test equipment, tools and operator.
Do not handle devices by the leads.
Store devices in conductive foam or carriers.
Avoid use of plastic, rubber or silk in MOS areas.
Maintain relative humidity above 50% if practical.
Table 21.
Pull-up/Pull-down Recommendations
Signal Type
Signals
Pull-up/Pull-down
60x bus control
BRn, TS, XATS, AACK, ARTRY, TA
Pull-up to 3.3V dc
60x bus address/transfer attributes
A[0:31], TT[0:4], TBST, WT, CI, GBL
Pull-up to 3.3V dc
Cache control
ADS
Pull-up to 3.3V dc
HIT, TV
Pull-up to 3.3V dc or pull-down to GND
depending on programmed polarity
PCI bus control
REQ, FRAME, IRDY, DEVSEL, TRDY,
STOP, SERR, PERR, LOCK, FLSHREQ,
ISA_MASTER
Pull-up to 5V dc
Note: For closed systems not requiring 5V
power, these may be pulled up to 3.3 VDC.
JTAG
TRST
Pull-down to GND (during normal system
operation)
Factory test
LSSD_MODE
Pull-up to 3.3V dc
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