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參數(shù)資料
| 型號： | TSPC106AVGU83CE |
| 英文描述： | MEMORY CONTROLLER |
| 中文描述： | 內(nèi)存控制器 |
| 文件頁數(shù)： | 17/40頁 |
| 文件大?。?/td> | 569K |
| 代理商： | TSPC106AVGU83CE |
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17
TSPC106
2102B
–
HIREL
–
02/02
PAR
Parity
1
O
Asserted indicates odd parity across the AD[31:0] and C/BE[3:0]
signals during address and data phases. Negated indicates even
parity.
I
Asserted indicates odd parity driven by another PCI master or the PCI
target during read data phases. Negated indicates even parity.
PERR
Parity error
1
O
Indicates that another PCI agent detected a data parity error.
I
Indicates that another PCI agent detected a data parity error.
PIRQ
Modified memory
interrupt request
1
O
In emulation mode (see
“
Address Maps
”
on page 19), indicates that a
PCI write has occurred to system memory that has not been recorded
by software.
REQ
PCI bus request
1
O
Indicates that the TSPC106 is requesting control of the PCI bus to
perform a transaction. Note that REQ is a point-to-point signal. Every
master has its own REQ signal.
SERR
System error
1
O
Indicates that an address parity error or some other system error
(where the result will be a catastrophic error) was detected.
I
Indicates that another target has detected a catastrophic error.
STOP
Stop
1
O
Indicates that the TSPC106, acting as the PCI target, is requesting that
the PCI bus master stop the current transaction.
I
Indicates that some other PCI agent is requesting that the PCI initiator
stop the current transaction.
TRDY
Target ready
1
O
Indicates that the TSPC106, acting as a PCI target, can complete the
current data phase of a PCI transaction. During a read, the TSPC106
asserts TRDY to indicate that valid data is present on AD[31:0]. During
a write, the TSPC106 asserts TRDY to indicate that it is prepared to
accept data.
I
Indicates that another PCI target is able to complete the current data
phase of a transaction.
Table 7.
PCI Interface Signals
Signal
Signal Name
Number of
Pins
I/O
Signal Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSPC106AVGU83CG | MEMORY CONTROLLER |
| TSPC106AMG66CE | MEMORY CONTROLLER |
| TSPC106AMG66CG | MEMORY CONTROLLER |
| TSPC106AMG83CE | MEMORY CONTROLLER |
| TSPC106AMG83CG | MEMORY CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSPC106AVGU83CG | 功能描述:IC PCI MEM CTRLR 83MHZ 303CBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| TSPC120-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 120W, 5A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:5A; Output Power Max:120W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 120W, 5A |
| TSPC240-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 240W, 10A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:10A; Output Power Max:240W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 240W, 10A |
| TSPC480-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 480W, 20A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:20A; Output Power Max:480W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 480W, 20A |
| TSPC603EMA5L | 制造商:e2v 功能描述: 制造商:e2v technologies 功能描述: |
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