參數(shù)資料
型號: TSXPC603RVGB/Q14LC
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 300 MHz, RISC PROCESSOR, CBGA255
封裝: 21 X 21 MM, 3 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-255
文件頁數(shù): 20/83頁
文件大?。?/td> 8336K
代理商: TSXPC603RVGB/Q14LC
195
7679H–CAN–08/08
AT90CAN32/64/128
17.11 USART Register Description
17.11.1
USART0 I/O Data Register – UDR0
17.11.2
USART1 I/O Data Register – UDR1
Bit 7:0 – RxBn7:0: Receive Data Buffer (read access)
Bit 7:0 – TxBn7:0: Transmit Data Buffer (write access)
The USARTn Transmit Data Buffer Register and USARTn Receive Data Buffer Registers share
the same I/O address referred to as USARTn Data Register or UDRn. The Transmit Data Buffer
Register (TXBn) will be the destination for data written to the UDRn Register location. Reading
the UDRn Register location will return the contents of the Receive Data Buffer Register (RXBn).
For 5-, 6-, or 7-bit characters the upper unused bits will be ignored by the Transmitter and set to
zero by the Receiver.
The transmit buffer can only be written when the UDREn flag in the UCSRnA Register is set.
Data written to UDRn when the UDREn flag is not set, will be ignored by the USARTn Transmit-
ter. When data is written to the transmit buffer, and the Transmitter is enabled, the Transmitter
will load the data into the Transmit Shift Register when the Shift Register is empty. Then the
data will be serially transmitted on the TxDn pin.
The receive buffer consists of a two level FIFO. The FIFO will change its state whenever the
receive buffer is accessed.
17.11.3
USART0 Control and Status Register A – UCSR0A
17.11.4
USART1 Control and Status Register A – UCSR1A
Bit 7 – RXCn: USARTn Receive Complete
This flag bit is set when there are unread data in the receive buffer and cleared when the receive
buffer is empty (i.e., does not contain any unread data). If the Receiver is disabled, the receive
buffer will be flushed and consequently the RXCn bit will become zero. The RXCn flag can be
used to generate a Receive Complete interrupt (see description of the RXCIEn bit).
Bit
7
6
543
210
RXB0[7:0]
UDR0 (Read)
TXB0[7:0]
UDR0 (Write)
Read/Write
R/W
Initial Value
0
Bit
7
6
543
210
RXB1[7:0]
UDR1 (Read)
TXB1[7:0]
UDR1 (Write)
Read/Write
R/W
Initial Value
0
Bit
765
4321
0
RXC0
TXC0
UDRE0
FE0
DOR0
UPE0
U2X0
MPCM0
UCSR0A
Read/Write
R
R/W
R
R/W
Initial Value
001
0000
0
Bit
765
4321
0
RXC1
TXC1
UDRE1
FE1
DOR1
UPE1
U2X1
MPCM1
UCSR1A
Read/Write
R
R/W
R
R/W
Initial Value
001
0000
0
相關(guān)PDF資料
PDF描述
TS80C31X2-LJER 8-BIT, 30 MHz, MICROCONTROLLER, PQFP44
TS80C32X2-ELCR 8-BIT, MICROCONTROLLER, PQFP44
TS80C31X2-VJBB 8-BIT, 40 MHz, MICROCONTROLLER, PQCC44
TSC80C31-16KAD 8-BIT, 16 MHz, MICROCONTROLLER, PDIP40
TSC80C31-40JDB 8-BIT, 40 MHz, MICROCONTROLLER, PQFP44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSXPC860SRVZQU66D 功能描述:IC MPU POWERQUICC 66MHZ 357PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
TSXPCX1031 制造商:Schneider Electric 功能描述:CABLE TO PC SERIAL PORT (SUB-D9) 制造商:Schneider Electric 功能描述:PROGRAMMABLE CABLE 制造商:Schneider Electric 功能描述:MULTI-FUNCTION COMMUNICATION CABLE 制造商:Schneider Electric 功能描述:PROGRAMMABLE CABLE; Accessory Type:Programmable Cable; For Use With:Schneider Non-Ethernet Based Twido PLCs ;RoHS Compliant: Yes 制造商:Schneider Electric 功能描述:Programme cable for twido-nano-micro PLC
TSXPLP01 制造商:Schneider Electric 功能描述:BATTERY FOR TSX 37 制造商:Schneider Electric 功能描述:BATTERY FOR TSX 37 ;ROHS COMPLIANT: YES 制造商:Schneider Electric 功能描述:TSXPLP01 PLC replacement battery
TSXPLP101 制造商:Schneider Electric 功能描述:BATTERY TSX 37 QTY.10, TSXPLP101
TSXPRGLDR 制造商:Schneider Electric 功能描述:PROGRAM LOADER FOR 07/37