參數(shù)資料
型號(hào)： TSXPC603RVGB/Q14LC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 300 MHz, RISC PROCESSOR, CBGA255
封裝： 21 X 21 MM, 3 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-255
文件頁(yè)數(shù)： 75/83頁(yè)
文件大?。?/td> 8336K
代理商： TSXPC603RVGB/Q14LC
87
7707F–AVR–11/10
AT90USB82/162
When a logic change on any PCINT12..8/7..0 pin triggers an interrupt request, PCIF1/0
becomes set (one). If the I-bit in SREG and the PCIE1/0 bit in PCICR are set (one), the MCU will
jump to the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is exe-
cuted. Alternatively, the flag can be cleared by writing a logical one to it.
12.0.7
Pin Change Mask Register 0 – PCMSK0
Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT7..0 is set and the PCIE0 bit in PCICR is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on the corresponding I/O pin
is disabled.
12.0.8
Pin Change Mask Register 1– PCMSK1
Bit 4..0 – PCINT12..8: Pin Change Enable Mask 12..8
Each PCINT12..8 bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT12..8 is set and the PCIE1 bit in PCICR is set, pin change interrupt is enabled on
the corresponding I/O pin. If PCINT12..8 is cleared, pin change interrupt on the corresponding
I/O pin is disabled.
Bit
7
6
54321
0
PCINT7
PCINT6
PCINT5
PCINT4
PCINT3
PCINT2
PCINT1
PCINT0
PCMSK0
Read/Write
R/W
Initial Value
0
00000
0
Bit
7
6
54321
0
-
PCINT12
PCINT11
PCINT10
PCINT9
PCINT8
PCMSK1
Read/Write
R
R/W
Initial Value
0
00000
0
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