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參數(shù)資料
| 型號： | UPD30550F2-300-NN1 |
| 廠商： | NEC Corp. |
| 英文描述： | VR5500⑩ 64-/32-BIT MICROPROCESSOR |
| 中文描述： | VR5500⑩64-/32-BIT微處理器 |
| 文件頁數(shù)： | 8/27頁 |
| 文件大?。?/td> | 569K |
| 代理商： | UPD30550F2-300-NN1 |
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Data Sheet U15700EJ1V0DS
8
μ
PD30550
1. PIN FUNCTIONS
Remark
# indicates active low.
1.1 List of Pin Functions
(1) System interface signals
Pin Name
I/O
Function
SysAD(63:0)
I/O
System address/data bus
A 64-bit bus for communication between the processor and external agent. The lower 32 bits
(SysAD(31:0)) are used in 32-bit bus mode.
SysADC(7:0)
I/O
System address/data check bus
A bus for SysAD bus parity. Valid only during a data cycle. The lower 32 bits (SysADC(3:0)) are
used in 32-bit bus mode.
SysCmd(8:0)
I/O
System command/data ID bus
A 9-bit bus that transfers command and data identifiers between the processor and external
agent
SysID(2:0)
I/O
System bus protocol ID
These signals transfer request identifiers in the out-of-order return mode.
The processor drives a valid identifier in synchronization with the activation of the ValidOut#
signal.
The external agent must drive valid identifiers in synchronization with the activation of the
ValidIn# signal.
ValidIn#
Input
Valid In
This signal indicates the external agent is driving a valid address or data onto the SysAD bus, a
valid command or data identifier onto the SysCmd bus, or a valid request identifier onto the
SysID bus in the out-of-order return mode.
ValidOut#
Output
Valid out
This signal indicates the processor is driving a valid address or data onto the SysAD bus, a valid
command or data identifier onto the SysCmd bus, or a valid request identifier onto the SysID bus
in the out-of-order return mode.
RdRdy#
Input
Read ready
This signal indicates the external agent is ready to accept a processor read request
WrRdy#
Input
Write ready
This signal indicates the external agent is ready to accept a processor write request
ExtRqst#
Input
External request
This signal indicates the external agent is requesting the right to use the system interface
Release#
Output
Releases interface
This signal indicates the processor is releasing the system interface to external agent control
PReq#
Output
Processor request
This signal indicates the processor has a request that is pending
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD30550F2-400-NN1 | 制造商:NEC 制造商全稱:NEC 功能描述:VR5500⑩ 64-/32-BIT MICROPROCESSOR |
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| UPD30700LRS-250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
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| UPD30700RS-200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
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