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參數(shù)資料
| 型號： | UPD30550F2-400-NN1 |
| 廠商： | NEC Corp. |
| 英文描述： | VR5500⑩ 64-/32-BIT MICROPROCESSOR |
| 中文描述： | VR5500⑩64-/32-BIT微處理器 |
| 文件頁數(shù)： | 12/27頁 |
| 文件大?。?/td> | 569K |
| 代理商： | UPD30550F2-400-NN1 |
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Data Sheet U15700EJ1V0DS
12
μ
PD30550
1.2 Recommended Connection of Unused Pins
(1) System interface pins
(a) 32-bit bus mode
The V
R
5500 allows selection of a SysAD bus width from 64 bits or 32 bits. When the 32-bit bus mode is
selected, the V
R
5500 operates using only the required system interface pins. Therefore, set the unused pins
as follows when operating the V
R
5500 in the 32-bit bus mode.
Pin Name
Recommended Connection
of Unused Pins
SysAD(63:32)
Leave open
SysADC(7:4)
Leave open
(b) Normal mode
The V
R
5500 can process read/write transactions regardless of the order in which requests are issued in the
out-of-order return mode. The SysID(2:0) signals are used to identify each request during this processing. Set
these signals, which are not used in the normal mode, as follows.
Pin Name
Recommended Connection
of Unused Pins
SysID(2:0)
Leave open
(c) Parity bus
The V
R
5500 allows selection of whether the data is protected using parity. When parity is used, the parity data
is output from the processor or external agent to the SysADC bus.
However, whether the parity is used or not is selected by software, so unless the program is started, the
V
R
5500 cannot determine the operation of the SysADC bus. Therefore, care must be taken to prevent the
SysADC bus from being left open or in a high-impedance state.
Each pin of the SysADC bus should be connected to V
DD
IO via a high resistance value resistor when parity is
not used.
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