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參數(shù)資料
| 型號： | UPD45128163-A75L |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 128M-bit Synchronous DRAM 4-bank, LVTTL |
| 中文描述： | 128兆位同步DRAM 4銀行，LVTTL |
| 文件頁數(shù)： | 33/86頁 |
| 文件大?。?/td> | 821K |
| 代理商： | UPD45128163-A75L |
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Data Sheet E0344N10 (Ver. 1.0)
33
μ
PD45128163
DC Characteristics 1 (Recommended Operating Conditions unless otherwise noted)
Maximum
×
16
Unit
Notes
Parameter
Symbol
Test condition
/CAS
latency
Grade
Operating current
I
CC1
Burst length = 1,
t
RC
≥
t
RC (MIN.)
, Io = 0 mA,
One bank active
CL = 2 -A75A
120
mA
1
-A75
110
-A80
110
-A10
110
CL = 3 -A75A
120
-A75
115
-A80
110
CKE
≤
V
IL (MAX.)
, t
CK
= 15 ns
I
CC2
PS CKE
≤
V
IL (MAX.)
, t
CK
=
∞
I
CC2
N
Input signals are changed one time during 30 ns.
CKE
≥
V
IH (MIN.)
, t
CK
=
∞
,
Input signals are stable.
CKE
≤
V
IL (MAX.)
, t
CK
= 15 ns
I
CC3
PS CKE
≤
V
IL (MAX.)
, t
CK
=
∞
I
CC3
N
Input signals are changed one time during 30 ns.
CKE
≥
V
IH (MIN.)
, t
CK
=
∞
,
Input signals are stable.
t
CK
≥
t
CK (MIN.)
, Io = 0 mA,
All banks active
-A10
110
Precharge standby current
I
CC2
P
1
mA
in power down mode
1
Precharge standby current
in non power down mode
CKE
≥
V
IH (MIN.)
, t
CK
= 15 ns, /CS
≥
V
IH (MIN.)
,
20
mA
I
CC2
NS
8
Active standby current
I
CC3
P
5
mA
in power down mode
4
Active standby current
in non power down mode
CKE
≥
V
IH (MIN.)
, t
CK
= 15 ns, /CS
≥
V
IH (MIN.)
,
30
mA
I
CC3
NS
20
Operating current
I
CC4
CL = 2 -A75A
185
mA
2
(Burst mode)
-A75
145
-A80
145
-A10
110
CL = 3 -A75A
185
-A75
185
-A80
175
-A10
140
CBR (auto) refresh current
I
CC5
t
RC
≥
t
RC (MIN.)
CL = 2 -A75A
270
mA
3
-A75
230
-A80
230
-A10
230
CL = 3 -A75A
270
-A75
240
-A80
230
CKE
≤
0.2 V
-A10
230
Self refresh current
I
CC6
-**
2
mA
-**L
0.8
mA
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured condition that addresses are changed only one time during t
CK (MIN.)
.
2.
I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured condition that addresses are changed only one time during t
CK (MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD45128163G5 | 制造商:Renesas Electronics Corporation 功能描述:128 MBIT SDRAM |
| UPD45128163G5-A75-9JF | 制造商:Elpida Memory Inc 功能描述:8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| UPD45128841G5-A75-9JF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 16M x 8, 54 Pin, Plastic, TSOP |
| UPD4516161AG5A109NF | 制造商:NEC Electronics Corporation 功能描述: |
| UPD4516161AG5-A10-9NF | 制造商:NEC Electronics Corporation 功能描述:SDRAM, 1M x 16, 50 Pin, Plastic, TSOP |
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