參數(shù)資料
型號: UPD720122F1-DN2
廠商: NEC Corp.
英文描述: MOS Integrated Circuit
中文描述: 馬鞍山集成電路
文件頁數(shù): 62/82頁
文件大?。?/td> 650K
代理商: UPD720122F1-DN2
Data Sheet S16685EJ2V0DS
62
μ
PD720122
(d) External local bus 8-bit mode DMA demand write transfer timing
Symbol
Parameter
Min.
Typ.
Max.
Unit
L8T58
DMA request acknowledge setup time (EP2_WRB
)
0
ns
L8T59
DMA demand mode write transfer cycle time
72
ns
L8T60
Write command width
38
ns
L8T61
Write command inactive time
34
ns
L8T62
Write data setup time (EP2_WRB
)
10
ns
L8T63
Write data hold time (EP2_WRB
)
0
ns
L8T66
DMA request off time (EP2_WRB
)
60
ns
L8T67
DMA request acknowledge hold time (EP2_WRB
)
0
ns
Remarks 1.
Use of EP1_TCB is prohibited in the 8-bit external local bus mode. Clamp this signal to the inactive
status.
LD15 to 8 are undefined in the 8-bit external local bus mode (these signals are invalid when input and
undefined when output).
It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
2.
3.
(Overall)
EP2_DRQB
EP2_TCB
LD7 to LD0
EP2_WRB
EP2_DACKB
N cycle
N
1 cycle
1 cycle
L8t
59
L8t
60
L8t
61
L8t
62
L8t
63
L8t
66
High level
L8t
67
L8t
62
L8t
63
L8t
58
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