
40
μ
PD75336
MB = MBE MBS (MBS = 0, 1, 2, 15)
MB = 0
MBE = 0 : MB = 0 (000H to 07FH)
MB = 15 (F80H to FFFH)
MBE = 1 : MB = MBS (MBS = 0, 1, 2, 15)
MB = 15, fmem = FB0H to FBFH,
FF0H to FFFH
MB = 15, pmem = FC0H to FFFH
addr = 0000H to 3F7FH
addr = (Current PC) –15 to (Current PC) –1
(Current PC) + 2 to (Current PC) + 16
caddr = 0000H to 0FFFH (PC
13, 12
= 00B) or
1000H to 1FFFH (PC
13, 12
= 01B) or
2000H to 2FFFH (PC
13, 12
= 10B) or
3000H to 3F7FH (PC
13, 12
= 11B)
faddr = 0000H to 07FFH
taddr = 0020H to 007FH
(3)
Description of symbols in the addressing area column
*1
*2
*3
*4
*5
*6
*7
*8
*9
*10
Data memory
addressing
Program memory
addressing
Remarks
1.
2.
3.
4.
MB indicates an accessible memory bank.
In *2, MB = 0 irrespective of MBE and MBS.
In *4 and *5, MB = 15 irrespective of MBE and MBS.
*6 to *10 indicate addressable areas.
(4)
Description of machine cycle column
S indicates the number of machine cycles required for an instruction with skip function to carry out skip operation.
The value of S varies as follows:
When not skipped ...................................................................................................................................
When the skipped instruction is a 1-byte or 2-byte instruction .......................................................
When the skipped instruction is a 3-byte instruction (BR !adder, CALL !adder instructions) .....
S = 0
S = 1
S = 2
Note
GETI instruction is skipped in a 1 machine cycle.
The 1 machine cycle is equal to one cycle of CPU clock
Φ
(=t
CY
) and four time periods are selectable by setting
the PCC.