參數(shù)資料
型號(hào): UPD75517GF
廠商: NEC Corp.
英文描述: 4 BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 110/180頁(yè)
文件大?。?/td> 1596K
代理商: UPD75517GF
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110
μ
PD75517(A)
4.8.6 Transfer Start in Each Mode
In each of the three-wire serial I/O, two-wire serial I/O, and SBI modes, serial transfer is started by writing
transfer data in shift register 0 (SIO0). However, the following two conditions must be satisfied:
The serial interface operation enable/disable bit (CSIE0) is set to 1.
The internal serial clock is not operating after 8-bit serial transfer, or SCK0 is high.
Caution Transfer cannot be started by setting CSIE0 to 1 after writing data to the shift register 0.
When eight bits have been transferred, serial transfer automatically terminates setting the interrupt request
flag (IRQCSI0).
[In the two-wire serial I/O mode]
Caution The N-ch transistor needs to be turned off when data is received. So FFH must be written to SIO0
beforehand.
[In the SBI mode]
Cautions 1.
The N-ch transistor needs to be turned off when data is received. So FFH must be written
to SIO0 beforehand.
However, when the wake-up function specification bit (WUP) is set to 1, the N-ch transistor
is always off. So FFH need not be written to SIO0 beforehand for reception.
If data is written to SIO0 when the slave is busy, the data is not lost.
Transfer is started when the busy state is released and input to SB0 (or SB1) goes high.
2.
Example
When RAM data specified by the HL register is transferred to SIO0, SIO0 data is loaded into the
accumulator at the same time, and serial transfer is started.
MOV
SEL
XCH
XA, @HL
MB15
XA, SIO0
; Extracts transmit data from RAM
; or CLR1 MBE
; Exchanges transmit data with receive data and starts transfer
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