- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378747 > UPD75517GF (NEC Corp.) 4 BIT SINGLE-CHIP MICROCOMPUTER PDF資料下載
參數(shù)資料
| 型號： | UPD75517GF |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 37/180頁 |
| 文件大?。?/td> | 1596K |
| 代理商： | UPD75517GF |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當(dāng)前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁
37
μ
PD75517(A)
Table 3-4 Information Indicated by the Interrupt Status Flag
The interrupt priority control circuit (see
Fig. 5-1
) checks this flag to control multiple interrupts.
The contents of the IST1 and IST0 are saved as part of the PSW to stack memory if an interrupt is accepted,
then are automatically set to a one-step higher status. The RETI instruction restores the contents present
before an interrupt occurs.
The interrupt status flag can be manipulated using a memory manipulation instruction, and the status of
processing being performed can be changed by program control.
Caution The user must always disable interrupts with the DI instruction before manipulating this flag,
and must enable interrupts with the EI instruction after manipulating this flag.
(4) Memory bank enable flag (MBE)
The memory bank enable flag is a 1-bit flag used to specify the address information generation mode for
the high-order four bits of a 12-bit data memory address.
When the MBE is set to 1, the data memory address space is expanded, allowing all data memory space
to be addressed.
When the MBE is reset to 0, the data memory address space is fixed, regardless of MBS setting. (See
Fig.
2-1
.)
A RESET signal occurrence automatically initializes the MBE by setting the MBE to the content of bit 7
at program memory address 0.
In vectored interrupt processing, the MBE is automatically set to the content of bit 7 in the vector address
table for servicing the interrupt.
Usually, the MBE is set to 0 in interrupt processing, and static RAM in memory bank 0 is used.
(5) Register bank enable flag (RBE)
The register bank enable flag is a 1-bit flag used to determine whether to expand the general register bank
configuration.
When the RBE is set to 1, a set of general registers can be selected from register banks 0 to 3, depending
on the setting of the register bank select register (RBS).
When the RBE is reset to 0, register bank 0 is always selected as general registers, regardless of the setting
of the RBS.
A RESET signal occurrence automatically initializes the RBE by setting the RBE to the content of bit 6 at
program memory address 0.
When a vectored interrupt occurs, the RBE is automatically set to the content of bit 6 in the vector address
table for servicing the interrupt. Usually, the RBE is set to 0 in interrupt processing. Register bank 0 is
used for 4-bit processing, and register banks 0 and 1 are used for 8-bit processing.
Normal program processing is being performed.
Any interrupts are acceptable.
A lower- or higher-priority interrupt is being serviced.
Higher-priority interrupts are acceptable.
A higher-priority interrupt is being serviced.
No interrupts are acceptable.
Not to be set
IST1
IST0
0
0
1
1
0
1
0
1
Status 0
Status 1
Status 2
—
Status of processing
being performed
Processing and interrupt control
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD75517GFA | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75518 | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75518GF | CAT5E PATCH CABLES SNAGLESS, RED 3 FT |
| UPD75518GFA | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75518A | 4 BIT SINGLE-CHIP MICROCOMPUTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD7554AG-597-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-597-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-611-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。