參數(shù)資料
型號: VS28F016SV
廠商: Intel Corp.
英文描述: 16-Mbit(1MBitx16) FLASHFILE MEMORY(16M位FLASHFILE存儲器)
中文描述: 16兆位(1MBitx16)FLASHFILE記憶(1,600位FLASHFILE存儲器)
文件頁數(shù): 38/50頁
文件大小: 612K
代理商: VS28F016SV
VS28F016SV, MS28F016SV FlashFile
TM
Memory
5.8 AC Characteristics for WE
Y
DControlled Command Write Operations
(1)
V
CC
e
5.0V
g
0.25V, T
CSE2
e b
40
§
C to
a
125
§
C, T
CSE1
e b
55
§
C to
a
125
§
C, Load
e
30 pF
V
CC
e
5.0V
g
0.5V, T
CSE2
e b
40
§
C to
a
125
§
C, T
CSE1
e b
55
§
C to
a
125
§
C, Load
e
100 pF
(Continued)
Versions
VS/MS28F016SV-85
V
CC
g
5%
VS/MS28F016SV-85
V
CC
g
10%
VS/MS28F016SV-100
V
CC
g
10%
Unit
Sym
Parameter
Notes
Min
Max
Min
Max
Min
Max
t
PHWL
RP
Y
High
Recovery to
WE
Y
Going
Low
3
1
1
1
m
s
t
WHGL
Write
Recovery
before Read
60
65
70
ns
t
QVVL(1)
t
QVVL(2)
V
PP
Hold
from Valid
Status
Register
(CSR, GSR,
BSR) Data
and RY/
BY
Y
High
3
0
0
0
m
s
t
WHQV(1)
Duration of
Word/Byte
Write
Operation
3,4,5,11
4.5
4.5
4.5
m
s
t
WHQV(2)
Duration of
Block Erase
Operation
3,4
0.3
10
0.3
10
0.3
10
sec
NOTES:
1. Read timings during write and erase are the same as for normal read.
2. Refer to command definition tables for valid address and data values.
3. Sampled, not 100% tested. Guaranteed by design.
4. Write/Erase durations are measured to valid Status Register (CSR) Data. V
PP
e
12.0V
g
0.6V
5. Word/Byte Write operations are typically performed with 1 Programming Pulse.
6. Address and Data are latched on the rising edge of WE
Y
for all Command Write operations.
7. CE
x
Y
is defined as the latter of CE
0
Y
or CE
1
Y
going low, or the first of CE
0
Y
or CE
1
Y
going high.
8. Device speeds are defined as:
80/85, 100 ns at V
CC
e
5.0V equivalent to
120 ns at V
CC
e
3.3V
9. See the high speed AC Input/Output Reference Waveforms and AC Testing Load Circuit.
10. See the standard AC Input/Output Reference Waveforms and AC Testing Load Circuit.
11. The TBD information will be available in a technical paper. Please contact Intel’s Application Hotline or your local sales
office for more information.
38
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