參數(shù)資料
型號: VT83C469
廠商: Electronic Theatre Controls, Inc.
英文描述: PCMCIA Socket Controller
中文描述: PCMCIA插槽控制器
文件頁數(shù): 15/36頁
文件大?。?/td> 156K
代理商: VT83C469
VIA Technologies, Inc.
Address
: Index ( Base + 06h )
Preliminary
VT83C469
15
B
IT
F
UNCTION
D[7:6]
I/O Window Enable [1:0].
0: Inhibit the card enable signals to the PC Card when an I/O access occurs within the
corresponding I/O address window.
1: Generate the card enable signals to PC card when an I/O access occurs within the
corresponding I/O address window. I/O accesses pass addresses from the system bus directly
through to the PC Card.
The start and stop register pairs must all be set to the desired window values before setting
this bit to one.
MS16# Decode A23:12.
0: Generated MS16# from a decode of the system address lines A23:17 only. This means that a
minimum, a 128K block of system memory address space is set aside as 16-bit memory only.
1: Generated MS16# from a decode of the system address lines A23:12.
Memory Window 4 Enable.
0: Inhibit the card enable signals to the PC Card when a memory access occurs within the
corresponding system memory address window.
1: Generate the card enable signals when a memory access occurs within the corresponding
system memory address window. When the system address is within the window, the computed
address will be generated to the PC Card.
Memory Window 3 Enable.
0: Inhibit the card enable signals to the PC Card when a memory access occurs within the
corresponding system memory address window.
1: Generate the card enable signals when a memory access occurs within the corresponding
system memory address window. When the system address is within the window, the computed
address will be generated to the PC Card.
Memory Window 2 Enable.
0: Inhibit the card enable signals to the PC Card when a memory access occurs within the
corresponding system memory address window.
1: Generate the card enable signals when a memory access occurs within the corresponding
system memory address window. When the system address is within the window, the computed
address will be generated to the PC Card.
Memory Window 1 Enable.
0: Inhibit the card enable signals to the PC Card when a memory access occurs within the
corresponding system memory address window.
1: Generate the card enable signals when a memory access occurs within the corresponding
system memory address window. When the system address is within the window, the computed
address will be generated to the PC Card.
Memory Window 0 Enable.
0: Inhibit the card enable signals to the PC Card when a memory access occurs within the
corresponding system memory address window.
1: Generate the card enable signals when a memory access occurs within the corresponding
system memory address window. When the system address is within the window, the computed
address will be generated to the PC Card.
NOTE: The start, stop and offset registers pairs must all be set to the desired window values
before setting bit to one.( All Memory Windows ).
D5
D4
D3
D2
D1
D0
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