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參數(shù)資料
| 型號： | VT83C469 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCMCIA Socket Controller |
| 中文描述： | PCMCIA插槽控制器 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大小： | 156K |
| 代理商： | VT83C469 |
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VIA Technologies, Inc.
Chip Mode Selection and Power-On Strapping
Preliminary
VT83C469
4
The VT83C469 can be set to four different modes: PCMCIA B Socket bus mode, ISA bus mode, normal mode and
Plug and Play mode. In the normal mode (under VG-468 pin definition), no advanced features of the VT83C469
such as Plug and Play, DMA and 3.3/5V sockets power supports are available. The ISA bus mode and the PCMCIA
B socket mode allows for add-on applications to control the data buffer's (ie. 74245) direction control. The Plug and
Play mode changes these pins to EEPROM for Plug and Play resource data support.
Mode Configuration
HDACK# (
PIN
67)
Pull up
Pull up
Pull down
Pull down
HTC (
PIN
68)
Pull up
Pull down
Pull up
Pull down
M
ODE
normal mode
ISA bus buffer mode
PCMCIA bus buffer mode
PnP mode
Buffered bus direction support and PnP mode
P
INS
PCMCIA B
SOCKET BUS MODE
SHBUFDIR
SLBUFDIR
---
ISA
BUS MODE
N
ORMAL
M
ODE
(VG-468
MODE
)
IRQ15
INTR#
SPKROUT
P
N
P
MODE
E2CS
E2SK
E2DIO
136
152
153
HHBUFDIR
HLBUFDIR
D7BUFDIR
Note:
SHBUFDIR Socket Data high byte direction
SLBUFDIR Socket Data low byte direction
HHBUFDIR ISA Data high byte direction
HLBUFDIR ISA Data high byte direction
PC Card interface I/O Register Addressing
The VT83C469 registers are accessed through an 8-bit indexing mechanism. Two I/O addresses are used to access
the VT83C469 registers. The first I/O address is the index register, which is fixed at 3E0h or 3E2h. The second I/O
address is the data register, which is fixed at 3E1h or 3E3h. During PnP mode, the contents of the EEPROM
resource data will determine whether the IO base will be set by the PnP BIOS or PnP utility. Each VT83C469
contains a block of 64 indirectly access registers. The starting base of the index register values in each VT83C469 is
selected by pull-up/pull-down strapping resistor on INTR# and SPKROUT# pin, according to the table below. While
RESETDRV is true, this pin is used for input. The falling edge of RESETDRV latches the pull up or down state of
this pin, and thereafter this pin is used for normal operation. The VT83C469 will not respond to a data register read
or write operation or to an index register read operation unless the index register has first been written to with a valid
index.
INTR#
SPKROUT# R
ESISTOR
Pull up
Pull down
Pull up
Pull down
B
ASE
00h
80h
00h
80h
I
NDEX
3E0h
3E0h
3E2h
3E2h
D
ATA
3E1h
3E1h
3E3h
3E3h
Pull up
Pull up
Pull down
Pull down
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