
VIA Technologies, Inc.
System Memory Address Mapping Stop Low Byte Register ( Read/Write )
Address
: Window 0 Index ( Base + 12h )
Address
: Window 1 Index ( Base + 1Ah )
Address
: Window 2 Index ( Base + 22h )
Address
: Window 3 Index ( Base + 2Ah )
Address
: Window 4 Index ( Base + 32h )
Preliminary
VT83C469
18
B
IT
F
UNCTION
D[7:0]
System Memory Window Stop Address A[19:12]
Low order address bits used to determine the stop address of the corresponding system memory
address mapping window. This provides a minimum 4K bytes window for memory address
mapping window.
System Memory Address Mapping Start High Byte Register ( Read/Write )
Address
: Window 0 Index ( Base + 13h )
Address
: Window 1 Index ( Base + 1Bh )
Address
: Window 2 Index ( Base + 23h )
Address
: Window 3 Index ( Base + 2Bh )
Address
: Window 4 Index ( Base + 33h )
B
IT
F
UNCTION
D[7:6]
Wait State bit 1:0.
These bits determine the number of additional wait states for a 16-bit access to the system memory
window. If the PC Card supports the WAIT# signal, wait states will be generated by the PC Card
asserting the WAIT# signal.
00: standard 16-bit cycle ( 3 BUSCLKs per access )
01: 1 additional wait state ( 4 BUSCLKs per access )
10: 2 additional wait states ( 5 BUSCLKs per access )
11: 3 additional wait states ( 6 BUSCLKs per access )
R/W. 00
System Memory Window Stop Address A23:20.
High order address bits used to determine the stop address of the corresponding system memory
window.
D[5:4]
D[3:0]
System Memory Address Mapping Offset Low Byte Register ( Read/Write )
Address
: Window 0 Index ( Base + 14h )
Address
: Window 1 Index ( Base + 1Ch )
Address
: Window 2 Index ( Base + 24h )
Address
: Window 3 Index ( Base + 2Ch )
Address
: Window 4 Index ( Base + 34h )
B
IT
F
UNCTION
D[7:0]
System Memory Window Offset Address A[19:12]
Low order address bits which added to the system address bits A19:12 to generate card address.