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參數(shù)資料
| 型號： | VT83C469 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PCMCIA Socket Controller |
| 中文描述： | PCMCIA插槽控制器 |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 156K |
| 代理商： | VT83C469 |
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VIA Technologies, Inc.
Preliminary
VT83C469
25
B
US
T
YPE
S
IGNAL
D
ESCRIPTION
P
IN
T
YPE
I
HDREQ
Host DMA Request. This is the DMA request from a DMA
device to the host.
Memory PC Cards drive Ready/Busy# low to indicate that the
memory card circuits are busy processing a previous write
command. It is set high when they are ready to accept a new data
transfer command.
208
I
RDY/
BSY#
(IREQ#)
For I/O PC Cards, this pin is used as an interrupt request and
driven low to indicate to the host that a device on the I/O PC
Card requires service by the host software. The signal is held at
the inactive level when no interrupt is requested.
Select attribute memory. This signal is set inactive (high) for all
accesses to common memory of a PC Card. When it is active,
access is limited to Attribute Memory when WE# or OE# are
active, and to I/O ports when IORD# or IOWR# are active. I/O
PC Cards will not respond to IORD# or IOWR# when the REG#
signal is inactive. During DMA operations the REG# signal is
inactive.
Provides a hard reset to a PC Card and clears the Card
Configuration Option Register, thus placing card in an
unconfigured (memory interface) state.
Active high indicates a main system reset.
Ring Indicate Output. Pass through of Ring Indicate output from
I/O PC Card. VG-468 can also be configured to activate RIO#
on card detect changes. RIO# will be functional in CS#
controlled power down. When disk drive LED enable is set, this
signal becomes a driver for disk drive LED. Also, a resistor
strapping input during RESETDRV to determine the functions of
pin B_CA [11:4].
System Address bus used to address memory and I/O devices on
the ISA bus. These signals are latched and are valid throughout
the bus cycle.
System Byte High Enable. When asserted, this active low signal
indicates that a data transfer is occurring on the upper byte of the
system data bus.
System Data Bus.
32, 103
I
S
REG#
1, 72
O
S
RESET
45, 116
O
I
S
RESETDRV
RIO#/LED
189
151
I
I/O
I
SA [16:0]
203-192, 190,
186-183
I
I
SBHE#
I
SD [15:0]
155-162, 172-
170, 168, 167,
165-163
206
I/O
I
SIOR#
This active low I/O read signal instructs the VG-468 to drive data
onto the data bus.
This active low I/O write signal instructs the VG-468 to latch the
data on the data bus.
I
I
SIOW#
207
I
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