
VIA Technologies, Inc.
I/O Address Stop Register Low Byte ( Read/Write )
Address
: Window 0 Index ( Base + 0Ah )
Address
: Window 1 Index ( Base + 0Eh )
Preliminary
VT83C469
17
B
IT
F
UNCTION
D[7:0]
I/O Window Stop Address A[7:0]
Low order address bits used to determine the stop address of the corresponding I/O address
window. This provides a minimum 1 byte window for I/O address window.
I/O Address Stop Register High Byte ( Read/Write )
Address
: Window 0 Index ( Base + 0Bh )
Address
: Window 1 Index ( Base + 0Fh )
B
IT
F
UNCTION
D[7:0]
I/O Window Stop Address A[15:8]
High order address bits used to determine the stop address of the corresponding I/O address
window.
System Memory Address Mapping Start Low Byte Register ( Read/Write )
Address
: Window 0 Index ( Base + 10h )
Address
: Window 1 Index ( Base + 18h )
Address
: Window 2 Index ( Base + 20h )
Address
: Window 3 Index ( Base + 28h )
Address
: Window 4 Index ( Base + 30h )
B
IT
F
UNCTION
D[7:0]
System Memory Window Start Address A[19:12]
Low order address bits used to determine the start address of the corresponding system memory
address mapping window. This provides a minimum 4K bytes window for memory address
mapping window.
System Memory Address Mapping Stop High Byte Register ( Read/Write )
Address
: Window 0 Index ( Base + 11h )
Address
: Window 1 Index ( Base + 19h )
Address
: Window 2 Index ( Base + 21h )
Address
: Window 3 Index ( Base + 29h )
Address
: Window 4 Index ( Base + 31h )
B
IT
F
UNCTION
D7
Data Size.
0: 8-bit memory data path to the PC Card.
1: 16-bit memory data path to the PC Card.
Zero Wait State.
0: System memory access will occur with additional wait states.
1: System memory access will occur with no additional wait states and the NOWS# signal will be
returned to the system bus. The WAIT# signal from PC Card will override this bit.
R/W. 00
System Memory Window Start Address A23:20.
High order address bits used to determine the start address of the corresponding system memory
address mapping window.
D6
D[5:4]
D[3:0]