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WESTERN DESIGN CENTER
W65C816S
March 1, 2000
5
SECTION 7 CAVEATS
...................................................................................................... 46
Table 7-1 W65C816S Compatibility Issues..................................................... 46
Stack Addressing............................................................................................. 49
Direct Addressing............................................................................................ 49
Absolute Indexed Addressing.......................................................................... 49
ABORTB Input............................................................................................... 49
VDA and VPA Valid Memory Address Output Signals.................................... 50
Apple II, IIe, IIc and II+ Disk Systems............................................................ 50
DB/BA operation when RDY is Pulled Low.................................................... 50
MX Output..................................................................................................... 50
All OpCodes Function in All Modes of Operation............................................ 50
Indirect Jumps................................................................................................. 50
Switching Modes............................................................................................. 51
7.12 How Hardware Interrupts, BRK, and COP Instructions Affect the Program
Bank and the Data Bank Registers.................................................................... 51
7.13
Binary Mode................................................................................................... 51
7.14
WAI Instruction.............................................................................................. 51
7.15
The STP Instruction........................................................................................ 51
7.16
COP Signatures............................................................................................... 52
7.17
WDM OpCode Use......................................................................................... 52
7.18
RDY Pulled During Write............................................................................... 52
7.19
MVN and MVP Affects on the Data Bank Register......................................... 52
7.20
Interrupt Priorities........................................................................................... 52
7.21 Transfers from 8-Bit to 16-Bit, or 16-Bit to 8-Bit Registers............................. 52
7.22
Stack Transfers................................................................................................52
7.23
BRK Instruction...............................................................................................52
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
SECTION 8 W65C816 DEVELOPER BOARD
.................................................................53
8.1
W65C816S Developer Board Block Diagram ..................................................53
SECTION 9 HARD CORE MODEL
..................................................................................55
9.1
W65C816 Core information.............................................................................55
SECTION 10 SOFT CORE RTL MODEL
.........................................................................56
SECTION 11 FIRM CORE MODEL
.................................................................................57
SECTION 12 ORDERING INFORMATION
..........................................................................58