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參數(shù)資料
| 型號(hào)： | W65C816S8P-14 |
| 元件分類： | 16位微控制器 |
| 英文描述： | 16-Bit Microprocessor |
| 中文描述： | 16位微處理器 |
| 文件頁數(shù)： | 7/62頁 |
| 文件大?。?/td> | 891K |
| 代理商： | W65C816S8P-14 |
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WESTERN DESIGN CENTER
W65C816S
March 1, 2000
7
SECTION 1
W65C816S FUNCTIONAL DESCRIPTION
The W65C816S provides the design engineer with upward mobility and software compatibility in applications where
a 16-bit system configuration is desired. The W65C816S's 16-bit hardware configuration, coupled with current
software, allows a wide selection of system applications. In the Emulation mode, the W65C816S offers many
advantages, including full software compatibility with 6502 coding. In addition, the W65C816S's powerful
instruction set and addressing modes make it an excellent choice for new 16-bit designs.
Internal organization of the W65C816S can be divided into two parts: 1) The Register Section and 2) The Control
Section. Instructions (or OpCodes) obtained from program memory are executed by implementing a series of data
transfers within the Register Section. Signals that cause data transfers to be executed are generated within the
Control Section. The W65C816S has a 16-bit internal architecture with an 8-bit external data bus.
1.1
Instruction Register and Decode (IR)
An OpCode enters the processor on the Data Bus, and is latched into the Instruction Register during the instruction fetch
cycle. This instruction is then decoded, along with timing and interrupt signals, to generate the various Instruction
Register control signals.
1.2
Timing Control Unit (TCU)
The Timing Control Unit keeps track of each instruction cycle as it is executed. The TCU is set to zero each time an
instruction fetch is executed, and is advanced at the beginning of each cycle for as many cycles as is required to complete
the instruction. Each data transfer between registers depends upon decoding the contents of both the Instruction Register
and the Timing Control Unit.
1.3
Arithmetic and Logic Unit (ALU)
All arithmetic and logic operations take place within the 16-bit ALU. In addition to data operations, the ALU also
calculates the effective address for relative and indexed addressing modes. The result of a data operation is stored in
either memory or an internal register. Carry, Negative, Overflow and Zero flags may be updated following the ALU data
operation.
1.4
Internal Registers (Refer to Programming Model)
1.5
Accumulators (A,B,C)
The Accumulator is a general purpose register which stores one of the operands, or the result of most arithmetic and
logical operations. In the Native mode (E=0), when the Accumulator Select Bit (M) equals zero, the Accumulator is
established as 16 bits wide (A, B=C). When the Accumulator Select Bit (M) equals one, the Accumulator is 8 bits wide
(A). In this case, the upper 8 bits (B) may be used for temporary storage in conjunction with the Exchange Accumulator
(XBA) instruction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W65C816S8PL-14 | 16-Bit Microprocessor |
| W65C816S8Q-14 | 16-Bit Microprocessor |
| W65C816SP10 | Microprocessor |
| W65C816SP-14 | 16-Bit Microprocessor |
| W65C816SPL10 | Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W65C816S8PL-14 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microprocessor |
| W65C816S8Q-14 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microprocessor |
| W65C816SP10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| W65C816SP-14 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microprocessor |
| W65C816SPL10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
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