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參數(shù)資料
| 型號： | W65C816SPL10 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 23/62頁 |
| 文件大小： | 891K |
| 代理商： | W65C816SPL10 |
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WESTERN DESIGN CENTER
W65C816S
March 1, 2000
23
3.5.18
The second byte of the instruction is added to the Direct Register to form a pointer to the low-order 16 bits
of the effective address. The Data Bank Register contains the high-order 8 bits of the effective address.
Direct Indirect-(d)
Instruction:
OpCode
offset
Direct Register
+
offset
00
(direct address)
then: +
Operand Address:
DBR
effective address
3.5.19
The second byte of the instruction is added to the Direct Register to form a pointer to the 24-bit effective
address.
Direct Indirect Long-[d]
Instruction:
OpCode
offset
Direct Register
then:
+
offset
00
(direct address)
direct address
Operand Address:
3.5.20
The second and third bytes of the instruction are added to the X Index Register to form a 16-bit pointer in
Bank 0. The contents of this pointer are loaded in the Program Counter. The Program Bank Register is
not changed.
Absolute Indexed Indirect-(a,x)
Instruction:
OpCode
addrl
addrh
addrh
addrl
X Reg
PBR
address
then:
PC = (address)
3.5.21
Stack addressing refers to all instructions that push or pull data from the stack, such as Push, Pull, Jump to
Subroutine, Return from Subroutine, Interrupts, and Return from Interrupt. The bank address is always
0. Interrupt Vectors are always fetched from Bank 0.
Stack-s
3.5.22
The low-order 16 bits of the effective address is formed from the sum of the second byte of the instruction
and the stack pointer. The high-order 8 bits of the effective address is always zero. The relative offset is
an unsigned 8-bit quantity in the range of 0 to 255.
Stack Relative-d,s
Instruction:
OpCode
offset
Stack Pointer
then:
Operand Address:
+
offset
00
effective address
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相關(guān)代理商/技術(shù)參數(shù) |
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| W65C816SQ-14 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microprocessor |
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