參數(shù)資料
型號(hào): W65C816SPL10
英文描述: Microprocessor
中文描述: 微處理器
文件頁(yè)數(shù): 58/62頁(yè)
文件大?。?/td> 891K
代理商: W65C816SPL10
WESTERN DESIGN CENTER
W65C816S
March 1, 2000
58
Features:
W65C816S 16-bit MPU, total access to all control lines, Memory Bus, Programmable I/O Bus,
PC Interface, 20 I/O lines, easy oscillator change, 32K SRAM, 32K EPROM, W65C22S
Versatile Interface Adapter VIA peripheral chip, on-board matrix, PLD for Memory map
decoding and ASIC design.
The PLD chip is a XILINX XC9572 for changing the chip select and I/O functions if required.
To change the PLD chip to suit your own setup, you need XILINX Data Manager for the
XC9572 CPLD chip. The W65C816DB includes an on-board programming header for JTAG
configuration. For more details refer to the circuit diagram. The on-board W65C816S and the
W65C22S devices have measurement points for core power consumption. Power input is
provided by an optional power board which plugs into the 10 pin power header.
An EPROM programmer or an EPROM emulator is required to use the board. WDC’s Software
Development System includes a W65C816S Assembler and Linker, W65C816S C-Compiler and
Optimizer, and W65C816S Simulator/Debugger. WDC’s PC IO daughter board can be used to
connect the Developer Board to the parallel port of a PC.
Memory map:
CS1B:
CS3B:
CS2B:
8000-FFFF
0000-00EF & 0100-7FFF
00F0-00FF
EPROM (27C256)
SRAM (62C256)
VIA (W65C22S)
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