參數(shù)資料
型號: W9412G2IB-4
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 4M X 32 DDR DRAM, 0.6 ns, PBGA144
封裝: 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA-144
文件頁數(shù): 34/50頁
文件大小: 826K
代理商: W9412G2IB-4
W9412G2IB
Publication Release Date: Aug. 30, 2010
- 4 -
Revision A06
1. GENERAL DESCRIPTION
W9412G2IB is a CMOS Double Data Rate synchronous dynamic random access memory (DDR
SDRAM); organized as 1,048,576 words
× 4 banks × 32 bits. W9412G2IB delivers a data bandwidth of
up to 500M words per second (-4). To fully comply with the personal computer industrial standard,
W9412G2IB is sorted into following speed grades: -4, -5, -5I, -6 and -6I. The -4 is compliant to the
DDR500/CL3 or CL4 specification. The -5/-5I is compliant to the DDR400/CL3 specification (-5I grade
which is guaranteed to support -40°C ~ 85°C). The -6/-6I is compliant to the DDR333/CL2.5
specification (-6I grade which is guaranteed to support -40°C ~ 85°C).
All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference
point for the differential clock is when the CLK and CLK signals cross during a transition. Write and
Read data are synchronized with the both edges of DQS (Data Strobe).
By having a programmable Mode Register, the system can change burst length, latency cycle,
interleave or sequential burst to maximize its performance. W9412G2IB is ideal for any high
performance applications.
2. FEATURES
2.5V
±0.2V Power Supply for DDR 333/400
2.5V
±0.1V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and CLK )
DQS is edge-aligned with data for Read; center-aligned with data for Write
CAS Latency: 2, 2.5, 3 and 4
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
15.6S Refresh interval (4K/64 mS Refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
Packaged in 144L LFBGA, using Lead free materials with RoHS compliant
相關PDF資料
PDF描述
W9425G6JB-5 DDR DRAM, PBGA60
W9425G8DH-6 32M X 8 DDR DRAM, 0.7 ns, PDSO66
W946432AD-6 2M X 32 DDR DRAM, 0.1 ns, PQFP100
W947D6HBHX6E 8M X 16 DDR DRAM, 5 ns, PBGA60
W9602BB PUSHBUTTON SWITCH, SPST, MOMENTARY, 10A, 28VDC, PANEL MOUNT-THREADED
相關代理商/技術參數(shù)
參數(shù)描述
W9412G2IB-5 制造商:Winbond Electronics Corp 功能描述:8*16 DDR1
W9412G6CH 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M 】 4 BANKS 】 16 BITS DDR SDRAM
W9412G6IH 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M × 4 BANKS × 16 BITS DDR SDRAM
W9412G6IH-5 功能描述:IC DDR-400 SDRAM 128MB 66TSSOPII RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C,2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC(0.173",4.40mm 寬) 供應商設備封裝:8-MFP 包裝:帶卷 (TR)
W9412G6JH 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M ? 4 BANKS ? 16 BITS DDR SDRAM