
W942508BH
8M
′
4 BANKS
′
8 BIT DDR SDRAM
Publication Release Date: March 19, 2002
- 1 -
Revision A1
Table of Contents-
1. GENERAL DESCRIPTION..................................................................................................................3
2. FEATURES..........................................................................................................................................3
3. KEY PARAMETERS............................................................................................................................3
4. PIN CONFIGURATION........................................................................................................................4
5. PIN DESCRIPTION .............................................................................................................................5
6. BLOCK DIAGRAM...............................................................................................................................6
7. ABSOLUTE MAXIMUM RATINGS ......................................................................................................7
8. RECOMMENDED DC OPERATING CONDITIONS............................................................................7
9. CAPACITANCE ...................................................................................................................................8
10. LEAKAGE AND OUTPUT BUFFER CHARACTERISTICS...............................................................8
11. DC CHARACTERISTICS...................................................................................................................9
12. AC CHARACTERISTICS AND OPERATING CONDITION.............................................................10
13. AC TEST CONDITIONS..................................................................................................................11
14. OPERATION MODE........................................................................................................................13
Simplified Truth Table............................................................................................................................ 13
Function Truth Table ............................................................................................................................. 14
Function Truth Table for CKE................................................................................................................ 17
15. SIMPLIFIED STATE DIAGRAM ......................................................................................................18
16. FUNCTIONAL DESCRIPTION ........................................................................................................19
Power Up Sequence.............................................................................................................................. 19
Command Function ............................................................................................................................... 19
Read Operation ..................................................................................................................................... 22
Write Operation ..................................................................................................................................... 22
Precharge.............................................................................................................................................. 22
Burst Termination .................................................................................................................................. 23
Refresh Operation ................................................................................................................................. 23
Power Down Mode ................................................................................................................................ 23
Mode Register Operation ...................................................................................................................... 23
17. TIMING WAVEFORMS....................................................................................................................27
Command Input Timing ......................................................................................................................... 27
Timing of the CLK Signals..................................................................................................................... 27
Read Timing (Burst Length = 4) ............................................................................................................ 28