參數(shù)資料
型號： X9520B20IB
廠商： Intersil Corporation
英文描述： Triple DCP, POR,2kbit EEPROM Memory, Dual Voltage Monitors
中文描述： 三氯酚，葡萄牙，2kbit EEPROM存儲器，雙電壓監(jiān)視器
文件頁數(shù)： 27/33頁
文件大?。?/td> 561K
代理商： X9520B20IB
27
FN8206.0
March 8, 2005
V
TRIPX
(X=1,2,3) PROGRAMMING PARAMETERS (See Figure 33)
Notes:
The above parameters are not 100% tested.
V1RO, V2RO, V3RO OUTPUT TIMING. (See Figure 30, Figure 31, Figure 32)
Notes: 1. See Figure 31 for timing diagram.
Notes: 2. See Figure 25 for equivalent load.
Notes: 3. This parameter describes the lowest possible V1 / Vcc level for which the outputs V1RO, V2RO, and V3RO will be correct with respect to
their inputs (V1 / Vcc, V2, V3).
Notes: 4. From MR rising edge crossing V
IH
, to V1RO rising edge crossing V
OH
.
Notes: 5. The above parameters are not 100% tested.
Parameter
t
VPS
t
VPH
t
TSU
t
THD
Description
Min
Typ
Max
Units
V
TRIPx
Program Enable Voltage Setup time
V
TRIPx
Program Enable Voltage Hold time
V
TRIPx
Setup time
V
TRIPx
Hold (stable) time
V
TRIPx
Program Enable Voltage Off time
(Between successive adjustments)
V
TRIPx
Write Cycle time
10
μ
s
10
μ
s
10
μ
s
10
μ
s
t
VPO
1
ms
t
wc
V
P
5
10
ms
Programming Voltage
10
15
V
V
ta
V
TRIPx
Program Voltage accuracy
(Programmed at 25
o
C.)
-100
+100
mV
V
tv
V
TRIP
Program variation after programming (-40 - 85
o
C).
(Programmed at 25
o
C.)
-25
+10
+25
mV
Symbol
Description
Condition
Min.
25
50
100
150
Typ.
50
100
200
300
Max.
75
150
300
450
Units
ms
ms
ms
ms
t
PURST (5)
Power On Reset delay time
POR1 = 0, POR0 = 0
POR1 = 0, POR0 = 1
POR1 = 1, POR0 = 0
POR1 = 1, POR0 = 1
t
MRD
(31)(2)(5)
MR to V1RO propagation delay
See
(1)(2)(4)
5
μ
s
t
MRDPW(5)
MR pulse width
500
ns
t
RPDx (5)
V1 / Vcc, V2, V3 to V1RO,
V2RO, V3RO propagation
delay (respectively)
20
μ
s
t
Fx (5)
V1 / Vcc, V2, V3 Fall Time
20
mV/
μ
s
t
Rx (5)
V1 / Vcc, V2, V3 Rise Time
20
mV/
μ
s
V
RVALID (5)
V1 / Vcc for V1RO, V2RO,
V3RO Valid
(3)
.
1
V
X9520
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