參數(shù)資料
型號: XA-H3
廠商: NXP Semiconductors N.V.
英文描述: CMOS 16-bit highly integrated microcontroller
中文描述: 的CMOS 16位高度集成的微控制器
文件頁數(shù): 2/36頁
文件大?。?/td> 183K
代理商: XA-H3
Philips Semiconductors
Preliminary specification
XA-H3
CMOS 16-bit highly integrated microcontroller
2
1999 Sep 24
DESCRIPTION
The powerful 16-bit XA CPU core and rich feature set make the
XA-H3 and XA-H4 devices ideal for high-performance real-time
applications such as industrial control and networking. By supporting
of up to 32 MB of external memory, these devices provide a low-cost
solution to embedded applications of any complexity. Features like
DMA, memory controller and four advanced UARTs help solve I/O
intensive tasks with a minimum of CPU load.
The XA-H3 feature set is a subset of the XA-H4 (see Table 1). The
XA-H3/H4 devices are members of the Philips XA (eXtended
Architecture) family of high performance 16-bit microcontrollers.
The XA-H3 and XA-H4 are designed to significantly minimize the
need for external components.
FEATURES
Large Memory Support (up to 6 MB external)
De-multiplexed Address/Data Bus
Six Programmable Chip Selects
Support for Unified Memory – allows easy user modification of
all code
External ISP Flash support for easy code download
Dynamic Bus Sizing – each of 6 Chip Selects can be programmed
for 8-bit or 16-bit bus.
Dynamic Bus Timing – each of 6 chip selects has individual
programmable bus timing.
32 Programmable General Purpose I/O Pins
Four UARTs with 230.4 kbps capability
Eight DMA Channels
Table 1. XA-H3 and XA-H4 features comparison
Feature
XA-H3
XA-H4
Maximum External Memory
(Harvard Memory Mode)
Maximum External Memory (Unified Memory Mode)
6 MB
32 MB
(16 MB Code, 16 MB Data)
16 MB
6 MB
Memory Controller supports both Harvard and Unified architectures
Yes
Yes
De-multiplexed Address/Data Bus
Yes
Yes
DRAM Controller
No
Yes
DMA Channels
8
8
Dynamic Bus Sizing
Yes
Yes
Dynamic Bus Timing
Yes
Yes
Programmable Chip Selects
6
6
General Purpose IO Pins
33
33
Potential Interrupt Pins
16
16
Interrupts (programmable priority)
7 Standard SW
4 High Priority SW
13 Hardware Event
7 Standard SW
4 High Priority SW
13 Hardware Event
Counter/Timers
Baud Rate Generators
1
2 plus Watchdog
2 plus Watchdog
4
4
Serial Ports
4 UARTS
4 USARTS
Maximum Serial Data Rates
asynch to 230.4 kbps (no sync)
asynch to 230.4 kbps
sync to 1 Mbps
4 async chars per USART
Match Characters
No
Hardware Autobaud
No
up to 230.4 kbps
SCP/SPI Bus
NOTE:
1. Can be used as additional counters if not needed as BRGs.
No
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