參數(shù)資料
型號: XC2S300E-6PQG208C
廠商: Xilinx Inc
文件頁數(shù): 81/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 300K 208PQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 24
系列: Spartan®-IIE
LAB/CLB數(shù): 1536
邏輯元件/單元數(shù): 6912
RAM 位總計: 65536
輸入/輸出數(shù): 146
門數(shù): 300000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應(yīng)商設(shè)備封裝: 208-PQFP(28x28)
其它名稱: 122-1326
74
DS077-4 (v3.0) August 9, 2013
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O
7
H5
-
I/O
I/O, VREF
Bank 7,
L#P_Y
7
H3
XC2S300E,
400E, 600E
All
I/O, VREF
Bank 7,
L81P
I/O, VREF
Bank 7,
L106P
I/O, VREF
Bank 7,
L113P
I/O, VREF
Bank 7,
L113P_Y
I/O, VREF
Bank 7,
L113P_Y
I/O, VREF
Bank 7,
L113P_Y
I/O, L#N_Y
7
H4
XC2S300E,
400E, 600E
-
I/O, L81N
I/O, L106N
I/O, L113N
I/O,
L113N_Y
I/O,
L113N_Y
I/O,
L113N_Y
I/O,
L#P_YY
7
H2
All
-
I/O,
L80P_YY
I/O,
L105P_YY
I/O,
L112P_YY
I/O,
L112P_YY
I/O,
L112P_YY
I/O,
L112P_YY
I/O,
L#N_YY
7
H1
All
-
I/O,
L80N_YY
I/O,
L105N_YY
I/O,
L112N_YY
I/O,
L112N_YY
I/O,
L112N_YY
I/O,
L112N_YY
I/O
7
J6
-
I/O
I/O, L#P_Y
7
J4
XC2S150E,
200E, 300E,
400E
-
I/O,
L104P_Y
I/O,
L111P_Y
I/O,
L111P_Y
I/O,
L111P_Y
I/O, L111P
I/O, L#N_Y
7
J5
XC2S100E,
150E, 200E,
300E, 400E
-
I/O, L79P_Y
I/O,
L104N_Y
I/O,
L111N_Y
I/O,
L111N_Y
I/O,
L111N_Y
I/O, L111N
I/O, L#P_Y
7
J3
XC2S100E,
150E, 200E,
300E, 600E
-
I/O,
L79N_Y
I/O,
L103P_Y
I/O,
L110P_Y
I/O,
L110P_Y
I/O, L110P
I/O,
L110P_Y
I/O, L#N_Y
7
J2
XC2S150E,
200E, 300E,
600E
-
I/O,
L103N_Y
I/O,
L110N_Y
I/O,
L110N_Y
I/O, L110N
I/O,
L110N_Y
I/O
7
J1
-
I/O
I/O, L#P
7
K5
XC2S100E,
150E, 200E,
300E,
600E(1)
-
I/O,
L78P_YY
I/O,
L102P_YY
I/O,
L109P_YY
I/O,
L109P_YY
I/O, L109P
I/O,
L109P_Y
I/O, L#N
7
K6
XC2S100E,
150E, 200E,
300E,
600E(1)
-
I/O,
L78N_YY
I/O,
L102N_YY
I/O,
L109N_YY
I/O,
L109N_YY
I/O, L109N
I/O,
L109N_Y
I/O, VREF
Bank 7,
L#P_Y
7
K3
XC2S300E,
400E, 600E
All
I/O, VREF
Bank 7,
L77P
I/O, VREF
Bank 7,
L101P
I/O, VREF
Bank 7,
L108P
I/O, VREF
Bank 7,
L108P_Y
I/O, VREF
Bank 7,
L108P_Y
I/O, VREF
Bank 7,
L108P_Y
I/O, L#N_Y
7
K4
XC2S300E,
400E, 600E
-
I/O, L77N
I/O, L101N
I/O, L108N
I/O,
L108N_Y
I/O,
L108N_Y
I/O,
L108N_Y
I/O
7
K2
-
I/O
I/O, L#P_Y
7
K1
XC2S300E,
400E
-
I/O, L107P
I/O,
L107P_Y
I/O,
L107P_Y
I/O, L107P
I/O, L#N_Y
7
L1
XC2S100E,
150E, 300E,
400E
-
I/O, L76P_Y
I/O,
L100P_Y
I/O, L107N
I/O,
L107N_Y
I/O,
L107N_Y
I/O, L107N
I/O, L#P_Y
7
L3
XC2S100E,
150E, 200E,
300E, 600E
XC2S400E,
600E
I/O,
L76N_Y
I/O,
L100N_Y
I/O,
L106P_Y
I/O,
L106P_Y
I/O, VREF
Bank 7,
L106P
I/O, VREF
Bank 7,
L106P_Y
I/O, L#N_Y
7
L2
XC2S200E,
300E, 600E
-
I/O
I/O,
L106N_Y
I/O,
L106N_Y
I/O, L106N
I/O,
L106N_Y
I/O
7
L4
-
I/O
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Device-Specific Pinouts: XC2S
Function
Bank
100E
150E
200E
300E
400E
600E
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