參數(shù)資料
型號: XC2S300E-6PQG208C
廠商: Xilinx Inc
文件頁數(shù): 95/108頁
文件大?。?/td> 0K
描述: IC SPARTAN-IIE FPGA 300K 208PQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標準包裝: 24
系列: Spartan®-IIE
LAB/CLB數(shù): 1536
邏輯元件/單元數(shù): 6912
RAM 位總計: 65536
輸入/輸出數(shù): 146
門數(shù): 300000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 208-BFQFP
供應商設備封裝: 208-PQFP(28x28)
其它名稱: 122-1326
DS077-4 (v3.0) August 9, 2013
87
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
I/O
0
F11
-
XC2S400E,
600E
-
I/O
I/O, VREF
Bank 0
I/O, VREF
Bank 0
I/O, L#P
0
A10
XC2S300E,
600E
-
I/O
I/O, L11P
I/O, L12P
I/O, L12P_Y
I/O, L12P
I/O, L12P_Y
I/O, L#N
0
B10
XC2S300E,
600E
-
I/O, L11N
I/O, L12N
I/O,
L12N_Y
I/O, L12N
I/O,
L12N_Y
I/O
0
E11
-
I/O
I/O, L#P
0
C10
XC2S200E,
300E, 400E,
600E
-
I/O, L8P
I/O, L10P
I/O, L11P_Y I/O, L11P_Y I/O, L11P_Y I/O, L11P_Y
I/O, VREF
Bank 0,
L#N
0
D10
XC2S200E,
300E, 400E,
600E
All
I/O, VREF
Bank 0,
L8N
I/O, VREF
Bank 0,
L10N
I/O, VREF
Bank 0,
L11N_Y
I/O, VREF
Bank 0,
L11N_Y
I/O, VREF
Bank 0,
L11N_Y
I/O, VREF
Bank 0,
L11N_Y
I/O
0
F10
-
I/O, L7P
I/O
I/O, L#P
0
A9
-
I/O, L7N
I/O
I/O, L10P
I/O, L#N
0
B9
-
I/O, L10N
I/O
0
E10
-
I/O
I/O, L#P
0
C9
XC2S100E,
150E, 200E
-
I/O, L6P_Y
I/O, L9P_Y
I/O, L9P
I/O, L#N
0
D9
XC2S100E,
150E, 200E
-
I/O, L6N_Y
I/O, L9N_Y
I/O, L9N
I/O, L#P
0
F9
XC2S150E,
200E
-
I/O, L8P_Y
I/O, L8P
I/O, L#N
0
E9
XC2S150E,
200E
-
I/O, L8N_Y
I/O, L8N
I/O, L#P
0
A8
XC2S100E,
200E, 300E,
400E, 600E
-
I/O, L5P_Y
I/O, L7P
I/O, L7P_Y
I/O, L#N
0
B8
XC2S100E,
200E, 300E,
400E, 600E
-
I/O, L5N_Y
I/O, L7N
I/O, L7N_Y
I/O, L#P
0
C8
XC2S100E,
200E, 300E,
400E, 600E
-
I/O, L4P_Y
I/O, L6P
I/O, L6P_Y
I/O, VREF
Bank 0,
L#N
0
D8
XC2S100E,
200E, 300E,
400E, 600E
All
I/O, VREF
Bank 0,
L4N_Y
I/O, VREF
Bank 0,
L6N
I/O, VREF
Bank 0,
L6N_Y
I/O, VREF
Bank 0,
L6N_Y
I/O, VREF
Bank 0,
L6N_Y
I/O, VREF
Bank 0,
L6N_Y
I/O
0
A7
-
I/O
0
B7
-
I/O
I/O, L#P
0
C7
XC2S150E,
200E
XC2S600E
I/O, L3P
I/O, L5P_Y
I/O, L5P
I/O, VREF
Bank 0, L5P
I/O, L#N
0
D7
XC2S150E,
200E
-
I/O, L3N
I/O, L5N_Y
I/O, L5N
I/O, L#P
0
E8
XC2S150E,
200E
-
I/O, L4P_Y
I/O, L4P
I/O, L#N
0
E7
XC2S150E,
200E
-
I/O, L4N_Y
I/O, L4N
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Device-Specific Pinouts: XC2S
Function
Bank
100E
150E
200E
300E
400E
600E
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