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參數(shù)資料
| 型號： | XC2S400E-6FG456I |
| 英文描述： | FPGA |
| 中文描述： | FPGA的 |
| 文件頁數(shù)： | 17/21頁 |
| 文件大?。?/td> | 183K |
| 代理商： | XC2S400E-6FG456I |
Spartan-IIE 1.8V FPGA Family: DC and Switching Characteristics
DS077-3 (v2.0) November 18, 2002
Product Specification
www.xilinx.com
1-800-255-7778
17
R
CLB Distributed RAM Switching Characteristics
CLB Shift Register Switching Characteristics
Block RAM Switching Characteristics
Symbol
Sequential Delays
T
SHCKO16
T
SHCKO32
Setup/Hold Times with Respect to Clock CLK
T
AS
/ T
AH
F/G address inputs
T
DS
/ T
DH
BX/BY data inputs (DIN)
T
WS
/ T
WH
CE input (WS)
Clock CLK
T
WPH
Pulse width, High
T
WPL
Pulse width, Low
T
WC
Clock period to meet address write cycle time
Description
Speed Grade
Units
-7
-6
Min
Max
Min
Max
Clock CLK to X/Y outputs (WE active, 16 x 1 mode)
Clock CLK to X/Y outputs (WE active, 32 x 1 mode)
0.6
0.8
1.5
1.9
0.6
0.8
1.7
2.1
ns
ns
0.42 / 0
0.53 / 0
0.7 / 0
-
-
-
0.5 / 0
0.6 / 0
0.8 / 0
-
-
-
ns
ns
ns
2.1
2.1
4.2
-
-
-
2.4
2.4
4.8
-
-
-
ns
ns
ns
Symbol
Sequential Delays
T
REG
Setup/Hold Times with Respect to Clock CLK
T
SHDICK
BX/BY data inputs (DIN)
T
SHCECK
CE input (WS)
Clock CLK
T
SRPH
Pulse width, High
T
SRPL
Pulse width, Low
Description
Speed Grade
Units
-7
-6
Min
Max
Min
Max
Clock CLK to X/Y outputs
1.2
2.9
1.2
3.2
ns
0.53 / 0
0.7 / 0
-
-
0.6 / 0
0.8 / 0
-
-
ns
ns
2.1
2.1
-
-
2.4
2.4
-
-
ns
ns
Symbol
Description
Speed Grade
Units
-7
-6
Min
Max
Min
Max
Sequential Delays
T
BCKO
Setup/Hold Times with Respect to Clock CLK
T
BACK
/ T
BCKA
ADDR inputs
T
BDCK
/ T
BCKD
DIN inputs
T
BECK
/ T
BCKE
EN inputs
T
BRCK
/ T
BCKR
RST input
T
BWCK
/ T
BCKW
WEN input
Clock CLK
T
BPWH
Pulse width, High
T
BPWL
Pulse width, Low
T
BCCS
CLKA -> CLKB setup time for different ports
Clock CLK to DOUT output
0.6
3.1
0.6
3.5
ns
1.0 / 0
1.0 / 0
2.2 / 0
2.1 / 0
2.0 / 0
-
-
-
-
-
1.1 / 0
1.1 / 0
2.5 / 0
2.3 / 0
2.2 / 0
-
-
-
-
-
ns
ns
ns
ns
ns
1.4
1.4
2.7
-
-
-
1.5
1.5
3.0
-
-
-
ns
ns
ns
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相關代理商/技術參數(shù) |
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| XC2S400E-6FG676C | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 676FBGA - Trays |
| XC2S400E-6FG676I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 676FBGA - Trays |
| XC2S400E-6FGG456C | 功能描述:IC SPARTAN-IIE FPGA 400K 456FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-IIE 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應商設備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC2S400E-6FGG456I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 456FBGA - Trays |
| XC2S400E-6FGG676C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE FPGA |
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