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參數(shù)資料
| 型號： | XC2S400E-6FG456I |
| 英文描述： | FPGA |
| 中文描述： | FPGA的 |
| 文件頁數(shù)： | 7/21頁 |
| 文件大?。?/td> | 183K |
| 代理商： | XC2S400E-6FG456I |
Spartan-IIE 1.8V FPGA Family: DC and Switching Characteristics
DS077-3 (v2.0) November 18, 2002
Product Specification
www.xilinx.com
1-800-255-7778
7
R
IOB Input Switching Characteristics
(1)
Input delays associated with the pad are specified for LVTTL levels. For other standards, adjust the delays with the values
shown in
IOB Input Delay Adjustments for Different Standards
, page 8
.
Symbol
Description
Device
Speed Grade
Units
-7
-6
Min
Max
Min
Max
Propagation Delays
T
IOPI
T
IOPID
T
IOPLI
Pad to I output, no delay
Pad to I output, with delay
Pad to output IQ via transparent latch,
no delay
Pad to output IQ via transparent latch,
with delay
All
All
All
0.4
0.5
0.7
0.8
1.0
1.5
0.4
0.5
0.7
0.8
1.0
1.6
ns
ns
ns
T
IOPLID
XC2S50E
XC2S100E
XC2S150E
XC2S200E
XC2S300E
XC2S400E
XC2S600E
1.3
1.3
1.3
1.3
1.3
1.4
1.5
3.0
3.0
3.2
3.2
3.2
3.2
3.5
1.3
1.3
1.3
1.3
1.3
1.4
1.5
3.1
3.1
3.3
3.3
3.3
3.4
3.7
ns
ns
ns
ns
ns
ns
ns
Sequential Delays
T
IOCKIQ
Setup/Hold Times with Respect to Clock CLK
T
IOPICK
/ T
IOICKP
Pad, no delay
T
IOPICKD
/ T
IOICKPD
Pad, with delay
Clock CLK to output IQ
All
0.1
0.7
0.1
0.7
ns
All
1.4 / 0
2.9 / 0
2.9 / 0
3.1 / 0
3.1 / 0
3.1 / 0
3.2 / 0
3.5 / 0
0.7 / 0.01
-
-
-
-
-
-
-
-
-
1.5 / 0
2.9 / 0
2.9 / 0
3.1 / 0
3.1 / 0
3.1 / 0
3.2 / 0
3.5 / 0
0.7 / 0.01
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
XC2S50E
XC2S100E
XC2S150E
XC2S200E
XC2S300E
XC2S400E
XC2S600E
All
T
IOICECK
/ T
IOCKICE
ICE input
Set/Reset Delays
T
IOSRCKI
T
IOSRIQ
T
GSRQ
Notes:
1.
Input timing for LVTTL is measured at 1.4V. For other I/O standards, see the table
Delay Measurement Methodology
, page 11
.
SR input (IFF, synchronous)
SR input to IQ (asynchronous)
GSR to output IQ
All
All
All
0.9
0.5
3.8
-
1.0
0.5
3.8
-
ns
ns
ns
1.2
8.5
1.4
9.7
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| XC2S400E-6FG676C | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 676FBGA - Trays |
| XC2S400E-6FG676I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 676FBGA - Trays |
| XC2S400E-6FGG456C | 功能描述:IC SPARTAN-IIE FPGA 400K 456FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-IIE 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應商設備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC2S400E-6FGG456I | 制造商:Xilinx 功能描述:FPGA SPARTAN-IIE 400K GATES 10800 CELLS 357MHZ 1.8V 456FBGA - Trays |
| XC2S400E-6FGG676C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-IIE FPGA |
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