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| 型號(hào)： | XC3S50AN-4TQ144I |
| 廠商： | Xilinx Inc |
| 文件頁(yè)數(shù)： | 41/123頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA SPARTAN 3AN 144TQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | Spartan®-3AN |
| LAB/CLB數(shù)： | 176 |
| 邏輯元件/單元數(shù)： | 1584 |
| RAM 位總計(jì)： | 55296 |
| 輸入/輸出數(shù)： | 108 |
| 門數(shù)： | 50000 |
| 電源電壓： | 1.14 V ~ 1.26 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
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Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
24
Switching Characteristics
All Spartan-3AN FPGAs ship in two speed grades: -4 and
the higher performance -5. Switching characteristics in this
document are designated as Preview, Advance,
Preliminary, or Production, as shown in Table 19. Each
category is defined as follows:
Preview: These specifications are based on estimates only
and should not be used for timing analysis.
Advance: These specifications are based on simulations
only and are typically available soon after establishing
FPGA specifications. Although speed grades with this
designation are considered relatively stable and
conservative, some under-reporting might still occur.
Preliminary: These specifications are based on complete
early silicon characterization. Devices and speed grades
with this designation are intended to give a better indication
of the expected performance of production silicon. The
probability of under-reporting preliminary delays is greatly
reduced compared to Advance data.
Production: These specifications are approved once
enough production silicon of a particular device family
member has been characterized to provide full correlation
between speed files and devices over numerous production
lots. There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes.
Typically, the slowest speed grades transition to Production
before faster speed grades.
Software Version Requirements
Production-quality systems must use FPGA designs
compiled using a speed file designated as PRODUCTION
status. FPGA designs using a less mature speed file
designation should only be used during system prototyping
or pre-production qualification. FPGA designs with speed
files designated as Preview, Advance, or Preliminary should
not be used in a production-quality system.
Whenever a speed file designation changes, as a device
matures toward Production status, rerun the latest Xilinx
ISE software on the FPGA design to ensure that the
FPGA design incorporates the latest timing information and
software updates.
In some cases, a particular family member (and speed
grade) is released to Production at a different time than
when the speed file is released with the Production label.
Any labeling discrepancies are corrected in subsequent
speed file releases. See Table 19 for devices that can be
considered to have the Production label.
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. Unless
otherwise noted, the published parameter values apply
to all Spartan-3AN devices. AC and DC characteristics
are specified using the same numbers for both
commercial and industrial grades.
Create a Xilinx user account and sign up to receive
automatic e-mail notification whenever this data sheet or
the associated user guides are updated.
Sign Up for Alerts
Timing parameters and their representative values are
selected for inclusion either because they are important as
general design requirements or they indicate fundamental
device performance characteristics. The Spartan-3AN
speed files (v1.41), part of the Xilinx Development Software,
are the original source for many but not all of the values.
The speed grade designations for these files are shown in
Table 19. For more complete, more precise, and worst-case
data, use the values reported by the Xilinx static timing
analyzer (TRACE in the Xilinx development software) and
back-annotated to the simulation netlist.
Table 20 provides the recent history of the Spartan-3AN
speed files.
Table 19: Spartan-3AN Family v1.41 Speed Grade
Designations
Device
Preview
Advance
Preliminary
Production
XC3S50AN
-4, -5
XC3S200AN
-4, -5
XC3S400AN
-4, -5
XC3S700AN
-4, -5
XC3S1400AN
-4, -5
Table 20: Spartan-3AN Speed File Version History
Version
ISE
Release
Description
1.41
ISE 10.1.03
Updated for Spartan-3A family. No
change to data for Spartan-3AN family.
1.40
ISE 10.1.02
Updated for Spartan-3A family. No
change to data for Spartan-3AN family.
1.39
ISE 10.1
Updated for Spartan-3A family. No
change to data for Spartan-3AN family.
1.38
ISE 9.2.03i
Updated to Production. No change to
data.
1.37
ISE 9.2.01i
Updated pin-to-pin setup and hold
times, TMDS output adjustment,
multiplier setup/hold times, and block
RAM clock width.
1.36
ISE 9.2i
Added -5 speed grade, updated to
Advance.
1.34
ISE 9.1.03i Updated pin-to-pin timing.
1.32
ISE 9.1.01i Preview speed files for -4 speed grade.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XC3S50AN-4TQG144C | 功能描述:IC SPARTAN-3AN FPGA 50K 144TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241 |
| XC3S50AN-4TQG144CES | 制造商:Xilinx 功能描述: |
| XC3S50AN-4TQG144I | 功能描述:IC FPGA SPARTAN-3AN50K 144-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241 |
| XC3S50AN-4TQG144ICES | 制造商:Xilinx 功能描述: |
| XC3S50AN-5FT256C | 制造商:Xilinx 功能描述:SPARTAN3AN - Trays 制造商:Xilinx 功能描述:IC FPGA SPARTAN-3AN 50K 256BGA 制造商:Xilinx 功能描述:IC FPGA 195 I/O 256FTBGA |
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