參數(shù)資料
型號: XC4VFX12-11FFG668I
廠商: Xilinx Inc
文件頁數(shù): 52/58頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-4 FX 12K 668FCBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-4 FX
LAB/CLB數(shù): 1368
邏輯元件/單元數(shù): 12312
RAM 位總計: 663552
輸入/輸出數(shù): 320
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 668-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 668-FCBGA
配用: HW-V4-ML403-UNI-G-ND - EVALUATION PLATFORM VIRTEX-4
HW-AFX-FF668-400-ND - BOARD DEV VIRTEX 4 FF668
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
DS302 (v3.7) September 9, 2009
Product Specification
56
12/11/06
(Cont’d)
2.0
(Cont’d)
Table 50: Removed T_LOCK_FX_MIN parameter. Added DCM_RESET.
Table 53: Added Note (1), no minimum frequency for PMCD.
Table 64: Added Note (1) to refer to LX and SX Errata for capability improvements.
03/27/07
2.1
SPEED SPECIFICATION version for this data sheet release: v1.64.
Table 4: Added Note (6) regarding max quiescent supply current.
Table 5: Filled in missing power-on current values for FX devices.
Table 24: Added new parameter FGREFCLK. Added Min value for Spread Spectrum
Clocking frequency. Corrected “Conditions”.
Table 26: Revised Notes (2) and (3).
Table 37, Table 38: Added column/values for XC4VFX -12.
Table 39: Added columns/values for XC4VFX -11 and -12. Corrected XC4VLX/SX -11
and -12 values for TREGXB, TREGYB, and TCKSH.
Table 43: Restored parameter TCONFIG and footnote (1) from earlier revision. Added
new parameter TSMCO (SelectMAP Readback Clock-to-Out).
Table 50: Restored DCM_RESET Minimum and DCM_INPUT_CLOCK_STOP
parameters from earlier revision. Added Notes (4) through (7) to these parameters.
Table 60: Removed FF1760 package. Not supported.
Table 63: Added FX devices and JTAG IDs.
06/08/07
2.2
SPEED SPECIFICATION version for this data sheet release: v1.65.
Table 14: Promoted -12 speed grade devices of XC4VFX12, XC4VFX20, and
XC4VFX60 to Production status.
Table 37: Removed parameter TISCCK_REV. Not meaningful because pin should always
be connected to GND.
Table 43: Added parameter FMAX_SELECTMAP. for maximum Slave SelectMAP mode
external configuration clock frequency.
Table 63: Filled in Step 1 values for XC4VFX20, XC4VFX60, and XC4VFX100.
Table 65: Added Step 1 data.
08/10/07
2.3
SPEED SPECIFICATION version for this data sheet release: v1.65.
Table 3: Added MAX value for IBATT .
Table 25: Added unit (ns) to RXSIGDET.
Table 27: Added Note (3) specifying range of DCI reference resistors and referring to
UG070.
Table 43: Added parameter FMAX_ICAP. Added word “Data” to description of
SelectMAP Setup/Hold.
Table 64: Added to Capability Improvements, for Step 1 that the DFS macro is no
longer needed.
09/10/07
2.4
SPEED SPECIFICATION version for this data sheet release: v1.67.
Table 14: Promoted all speed grades for XC4VFX40 devices, and -12 speed grade for
XC4VFX100 devices, to Production status.
Table 63: Filled in Step 1 value for XC4VFX40.
Table 65: Added Note 1.
Date
Version
Revisions
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XC4VFX12-11SF363C 制造商:Xilinx 功能描述:FPGA VIRTEX-4 12312 CELLS 90NM 1.2V 363FCBGA - Trays
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